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i386: Don't allow GOTOFF relocation against IFUNC symbol for PIC
We can't use the PLT entry as the function address for PIC since the PIC register may not be set up properly for indirect call. bfd/ PR ld/27998 * elf32-i386.c (elf_i386_relocate_section): Don't allow GOTOFF relocation against IFUNC symbol for PIC. ld/ PR ld/27998 * testsuite/ld-i386/pr27998a.d: Replace -shared with -e bar. * testsuite/ld-i386/pr27998b.d: Expect a linker error. * testsuite/ld-ifunc/ifunc-2-i386-now.d: Updated. * testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-i386.s: Replace @GOTOFF with @GOT. * testsuite/ld-ifunc/ifunc-2-local-i386.s: Likewise.
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@@ -2460,6 +2460,11 @@ elf_i386_relocate_section (bfd *output_bfd,
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goto do_relocation;
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goto do_relocation;
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case R_386_GOTOFF:
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case R_386_GOTOFF:
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/* NB: We can't use the PLT entry as the function address
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for PIC since the PIC register may not be set up
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properly for indirect call. */
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if (bfd_link_pic (info))
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goto bad_ifunc_reloc;
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relocation -= (gotplt->output_section->vma
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relocation -= (gotplt->output_section->vma
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+ gotplt->output_offset);
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+ gotplt->output_offset);
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goto do_relocation;
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goto do_relocation;
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@@ -1,5 +1,5 @@
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#as: --32
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#as: --32
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#ld: -shared -melf_i386
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#ld: -e bar -melf_i386
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#readelf: -r --wide
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#readelf: -r --wide
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Relocation section '.rel.plt' at offset 0x[0-9a-f]+ contains 1 entry:
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Relocation section '.rel.plt' at offset 0x[0-9a-f]+ contains 1 entry:
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@@ -1,7 +1,3 @@
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#as: --32
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#as: --32
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#ld: -shared -melf_i386
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#ld: -shared -melf_i386
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#readelf: -r --wide
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#error: relocation R_386_GOTOFF against STT_GNU_IFUNC symbol `foo' isn't supported
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Relocation section '.rel.plt' at offset 0x[0-9a-f]+ contains 1 entry:
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Offset Info Type Sym. Value Symbol's Name
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[0-9a-f]+ +[0-9a-f]+ +R_386_IRELATIVE +
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@@ -31,6 +31,6 @@ Disassembly of section .text:
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+[a-f0-9]+: 5b pop %ebx
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+[a-f0-9]+: 5b pop %ebx
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+[a-f0-9]+: 81 c3 9e 10 00 00 add \$0x109e,%ebx
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+[a-f0-9]+: 81 c3 9e 10 00 00 add \$0x109e,%ebx
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+[a-f0-9]+: e8 de ff ff ff call 100 <\*ABS\*@plt>
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+[a-f0-9]+: e8 de ff ff ff call 100 <\*ABS\*@plt>
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+[a-f0-9]+: 8d 83 4c ef ff ff lea -0x10b4\(%ebx\),%eax
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+[a-f0-9]+: 8b 83 0c 00 00 00 mov 0xc\(%ebx\),%eax
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+[a-f0-9]+: c3 ret
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+[a-f0-9]+: c3 ret
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#pass
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#pass
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@@ -16,6 +16,6 @@ bar:
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popl %ebx
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popl %ebx
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addl $_GLOBAL_OFFSET_TABLE_+[.-.L6], %ebx
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addl $_GLOBAL_OFFSET_TABLE_+[.-.L6], %ebx
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call __GI_foo@PLT
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call __GI_foo@PLT
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leal __GI_foo@GOTOFF(%ebx), %eax
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movl __GI_foo@GOT(%ebx), %eax
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ret
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ret
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.size bar, .-bar
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.size bar, .-bar
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@@ -31,6 +31,6 @@ Disassembly of section .text:
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+[a-f0-9]+: 5b pop %ebx
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+[a-f0-9]+: 5b pop %ebx
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+[a-f0-9]+: 81 c3 9e 10 00 00 add \$0x109e,%ebx
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+[a-f0-9]+: 81 c3 9e 10 00 00 add \$0x109e,%ebx
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+[a-f0-9]+: e8 de ff ff ff call f0 <\*ABS\*@plt>
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+[a-f0-9]+: e8 de ff ff ff call f0 <\*ABS\*@plt>
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+[a-f0-9]+: 8d 83 4c ef ff ff lea -0x10b4\(%ebx\),%eax
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+[a-f0-9]+: 8b 83 0c 00 00 00 mov 0xc\(%ebx\),%eax
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+[a-f0-9]+: c3 ret
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+[a-f0-9]+: c3 ret
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#pass
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#pass
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@@ -13,6 +13,6 @@ bar:
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popl %ebx
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popl %ebx
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addl $_GLOBAL_OFFSET_TABLE_+[.-.L6], %ebx
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addl $_GLOBAL_OFFSET_TABLE_+[.-.L6], %ebx
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call __GI_foo@PLT
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call __GI_foo@PLT
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leal __GI_foo@GOTOFF(%ebx), %eax
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movl __GI_foo@GOT(%ebx), %eax
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ret
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ret
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.size bar, .-bar
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.size bar, .-bar
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