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Arm: Change CRC from fpu feature to archititectural extension

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This patch changes the CRC extension to use the core feature bits instead
of the coproc/fpu feature bits.
CRC is not an fpu feature and it causes issues with the new fpu reset
patch (f439988037). CRC can be set using
the '.arch_extension' directive, which sets bits in the coproc bitfield. When
a '.fpu' directive is encountered, the CRC feature bit gets removed and
there is no way to set it back using '.fpu'.
With this patch, CRC will be marked in the feature core bits, which prevents
it from getting removed when setting/changing the fpu options.

gas/ChangeLog:

	* config/tc-arm.c (arm_ext_crc): New.
	(crc_ext_armv8): Remove.
	(insns): Rename crc_ext_armv8 to arm_ext_crc.
	(arm_cpus): Replace CRC_EXT_ARMV8 with ARM_EXT2_CRC.
	(armv8a_ext_table, armv8r_ext_table,
	arm_option_extension_value_table): Redefine the crc
	extension in terms of ARM_EXT2_CRC.
	* gas/testsuite/gas/arm/crc-ext.s: New.
	* gas/testsuite/gas/arm/crc-ext.d: New.

include/ChangeLog:

	* opcode/arm.h (ARM_EXT2_CRC): New extension feature
	to replace CRC_EXT_ARMV8.
	(CRC_EXT_ARMV8): Remove and mark bit as unused.
	(ARM_ARCH_V8A_CRC, ARM_ARCH_V8_1A, ARM_ARCH_V8_2A,
	ARM_ARCH_V8_3A, ARM_ARCH_V8_4A, ARM_ARCH_V8_5A,
	ARM_ARCH_V8_6A): Redefine using ARM_EXT2_CRC instead of
	CRC_EXT_ARMV8.

opcodes/ChangeLog:

	* opcodes/arm-dis.c (arm_opcodes, thumb32_opcodes):
	Change the coproc CRC conditions to use the extension
	feature set, second word, base on ARM_EXT2_CRC.
This commit is contained in:
Mihail Ionescu
2019-11-22 13:44:17 +00:00
committed by Tamar Christina
parent a2e098c378
commit 8b301fbb61
8 changed files with 106 additions and 44 deletions
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24
opcodes/arm-dis.c
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@@ -3641,17 +3641,17 @@ static const struct opcode32 arm_opcodes[] =
{ARM_FEATURE_CORE_LOW (ARM_EXT2_ATOMICS),
0x01f00c9f, 0x0ff00fff, "ldah%c\t%12-15r, [%16-19R]"},
/* CRC32 instructions. */
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
0xe1000040, 0xfff00ff0, "crc32b\t%12-15R, %16-19R, %0-3R"},
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
0xe1200040, 0xfff00ff0, "crc32h\t%12-15R, %16-19R, %0-3R"},
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
0xe1400040, 0xfff00ff0, "crc32w\t%12-15R, %16-19R, %0-3R"},
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
0xe1000240, 0xfff00ff0, "crc32cb\t%12-15R, %16-19R, %0-3R"},
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
0xe1200240, 0xfff00ff0, "crc32ch\t%12-15R, %16-19R, %0-3R"},
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
0xe1400240, 0xfff00ff0, "crc32cw\t%12-15R, %16-19R, %0-3R"},
/* Privileged Access Never extension instructions. */
@@ -4657,17 +4657,17 @@ static const struct opcode32 thumb32_opcodes[] =
0xe8d000ff, 0xfff000ff, "ldaexd%c\t%12-15r, %8-11r, [%16-19R]"},
/* CRC32 instructions. */
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
0xfac0f080, 0xfff0f0f0, "crc32b\t%8-11R, %16-19R, %0-3R"},
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
0xfac0f090, 0xfff0f0f0, "crc32h\t%9-11R, %16-19R, %0-3R"},
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
0xfac0f0a0, 0xfff0f0f0, "crc32w\t%8-11R, %16-19R, %0-3R"},
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
0xfad0f080, 0xfff0f0f0, "crc32cb\t%8-11R, %16-19R, %0-3R"},
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
0xfad0f090, 0xfff0f0f0, "crc32ch\t%8-11R, %16-19R, %0-3R"},
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
0xfad0f0a0, 0xfff0f0f0, "crc32cw\t%8-11R, %16-19R, %0-3R"},
/* Speculation Barriers. */