Update function declarations to ISO C90 formatting

This commit is contained in:
Nick Clifton
2005-07-01 11:16:33 +00:00
parent e4e8248d79
commit 47b0e7ad8c
119 changed files with 13365 additions and 15909 deletions

View File

@@ -1,26 +1,27 @@
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
THIS FILE IS MACHINE GENERATED WITH CGEN.
- the resultant file is machine generated, cgen-asm.in isn't
THIS FILE IS MACHINE GENERATED WITH CGEN.
- the resultant file is machine generated, cgen-asm.in isn't
Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
This file is part of the GNU Binutils and GDB, the GNU debugger.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
Keep that in mind. */
@@ -51,30 +52,24 @@ static const char * parse_insn_normal
#include "safe-ctype.h"
static int iq2000_cgen_isa_register PARAMS ((const char **));
static const char * parse_jtargq10 PARAMS ((CGEN_CPU_DESC, const char **, int, int, enum cgen_parse_operand_result *, bfd_vma *));
static const char * parse_mimm PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
static const char * parse_imm PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
static const char * parse_hi16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
static const char * parse_lo16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
static const char * parse_mlo16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'");
/* Special check to ensure that instruction exists for given machine. */
/* Special check to ensure that instruction exists for given machine */
int
iq2000_cgen_insn_supported (cd, insn)
CGEN_CPU_DESC cd;
const CGEN_INSN *insn;
iq2000_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
{
int machs = cd->machs;
return ((CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH) & machs) != 0);
return (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH) & machs) != 0;
}
static int iq2000_cgen_isa_register (strp)
const char **strp;
static int
iq2000_cgen_isa_register (const char **strp)
{
int len;
int ch1, ch2;
if (**strp == 'r' || **strp == 'R')
{
len = strlen (*strp);
@@ -94,7 +89,9 @@ static int iq2000_cgen_isa_register (strp)
return 1;
}
}
if (**strp == '%' && TOLOWER((*strp)[1]) != 'l' && TOLOWER((*strp)[1]) != 'h')
if (**strp == '%'
&& TOLOWER ((*strp)[1]) != 'l'
&& TOLOWER ((*strp)[1]) != 'h')
return 1;
return 0;
}
@@ -102,11 +99,10 @@ static int iq2000_cgen_isa_register (strp)
/* Handle negated literal. */
static const char *
parse_mimm (cd, strp, opindex, valuep)
CGEN_CPU_DESC cd;
const char **strp;
int opindex;
unsigned long *valuep;
parse_mimm (CGEN_CPU_DESC cd,
const char **strp,
int opindex,
unsigned long *valuep)
{
const char *errmsg;
@@ -134,11 +130,10 @@ parse_mimm (cd, strp, opindex, valuep)
/* Handle signed/unsigned literal. */
static const char *
parse_imm (cd, strp, opindex, valuep)
CGEN_CPU_DESC cd;
const char **strp;
int opindex;
unsigned long *valuep;
parse_imm (CGEN_CPU_DESC cd,
const char **strp,
int opindex,
unsigned long *valuep)
{
const char *errmsg;
@@ -152,6 +147,7 @@ parse_imm (cd, strp, opindex, valuep)
if (errmsg == NULL)
{
long x = value & 0xFFFF0000;
if (x != 0 && x != (long) 0xFFFF0000)
errmsg = _("immediate value out of range");
else
@@ -164,23 +160,23 @@ parse_imm (cd, strp, opindex, valuep)
/* Handle iq10 21-bit jmp offset. */
static const char *
parse_jtargq10 (cd, strp, opindex, reloc, type_addr, valuep)
CGEN_CPU_DESC cd;
const char **strp;
int opindex;
int reloc ATTRIBUTE_UNUSED;
enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED;
bfd_vma *valuep;
parse_jtargq10 (CGEN_CPU_DESC cd,
const char **strp,
int opindex,
int reloc ATTRIBUTE_UNUSED,
enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED,
bfd_vma *valuep)
{
const char *errmsg;
bfd_vma value;
enum cgen_parse_operand_result result_type = CGEN_PARSE_OPERAND_RESULT_NUMBER;
errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_OFFSET_21,
&result_type, &value);
& result_type, & value);
if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
{
/* Check value is within 23-bits (remembering that 2-bit shift right will occur). */
/* Check value is within 23-bits
(remembering that 2-bit shift right will occur). */
if (value > 0x7fffff)
return _("21-bit offset out of range");
}
@@ -191,11 +187,10 @@ parse_jtargq10 (cd, strp, opindex, reloc, type_addr, valuep)
/* Handle high(). */
static const char *
parse_hi16 (cd, strp, opindex, valuep)
CGEN_CPU_DESC cd;
const char **strp;
int opindex;
unsigned long *valuep;
parse_hi16 (CGEN_CPU_DESC cd,
const char **strp,
int opindex,
unsigned long *valuep)
{
if (strncasecmp (*strp, "%hi(", 4) == 0)
{
@@ -205,17 +200,17 @@ parse_hi16 (cd, strp, opindex, valuep)
*strp += 4;
errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
&result_type, &value);
& result_type, & value);
if (**strp != ')')
return _("missing `)'");
return MISSING_CLOSING_PARENTHESIS;
++*strp;
if (errmsg == NULL
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
{
/* if value has top-bit of %lo on, then it will
/* If value has top-bit of %lo on, then it will
sign-propagate and so we compensate by adding
1 to the resultant %hi value */
1 to the resultant %hi value. */
if (value & 0x8000)
value += 0x10000;
value >>= 16;
@@ -225,8 +220,8 @@ parse_hi16 (cd, strp, opindex, valuep)
return errmsg;
}
/* we add %uhi in case a user just wants the high 16-bits or is using
an insn like ori for %lo which does not sign-propagate */
/* We add %uhi in case a user just wants the high 16-bits or is using
an insn like ori for %lo which does not sign-propagate. */
if (strncasecmp (*strp, "%uhi(", 5) == 0)
{
enum cgen_parse_operand_result result_type;
@@ -235,16 +230,15 @@ parse_hi16 (cd, strp, opindex, valuep)
*strp += 5;
errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_UHI16,
&result_type, &value);
& result_type, & value);
if (**strp != ')')
return _("missing `)'");
return MISSING_CLOSING_PARENTHESIS;
++*strp;
if (errmsg == NULL
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
{
value >>= 16;
}
value >>= 16;
*valuep = value;
return errmsg;
@@ -258,11 +252,10 @@ parse_hi16 (cd, strp, opindex, valuep)
handles the case where %lo() isn't present. */
static const char *
parse_lo16 (cd, strp, opindex, valuep)
CGEN_CPU_DESC cd;
const char **strp;
int opindex;
unsigned long *valuep;
parse_lo16 (CGEN_CPU_DESC cd,
const char **strp,
int opindex,
long *valuep)
{
if (strncasecmp (*strp, "%lo(", 4) == 0)
{
@@ -272,9 +265,9 @@ parse_lo16 (cd, strp, opindex, valuep)
*strp += 4;
errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
&result_type, &value);
& result_type, & value);
if (**strp != ')')
return _("missing `)'");
return MISSING_CLOSING_PARENTHESIS;
++*strp;
if (errmsg == NULL
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
@@ -291,11 +284,10 @@ parse_lo16 (cd, strp, opindex, valuep)
handles the case where %lo() isn't present. */
static const char *
parse_mlo16 (cd, strp, opindex, valuep)
CGEN_CPU_DESC cd;
const char **strp;
int opindex;
unsigned long *valuep;
parse_mlo16 (CGEN_CPU_DESC cd,
const char **strp,
int opindex,
long *valuep)
{
if (strncasecmp (*strp, "%lo(", 4) == 0)
{
@@ -305,9 +297,9 @@ parse_mlo16 (cd, strp, opindex, valuep)
*strp += 4;
errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
&result_type, &value);
& result_type, & value);
if (**strp != ')')
return _("missing `)'");
return MISSING_CLOSING_PARENTHESIS;
++*strp;
if (errmsg == NULL
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
@@ -322,7 +314,7 @@ parse_mlo16 (cd, strp, opindex, valuep)
/* -- */
const char * iq2000_cgen_parse_operand
PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *));
(CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
/* Main entry point for operand parsing.
@@ -338,11 +330,10 @@ const char * iq2000_cgen_parse_operand
the handlers. */
const char *
iq2000_cgen_parse_operand (cd, opindex, strp, fields)
CGEN_CPU_DESC cd;
int opindex;
const char ** strp;
CGEN_FIELDS * fields;
iq2000_cgen_parse_operand (CGEN_CPU_DESC cd,
int opindex,
const char ** strp,
CGEN_FIELDS * fields)
{
const char * errmsg = NULL;
/* Used by scalar operands that still need to be parsed. */
@@ -475,8 +466,7 @@ cgen_parse_fn * const iq2000_cgen_parse_handlers[] =
};
void
iq2000_cgen_init_asm (cd)
CGEN_CPU_DESC cd;
iq2000_cgen_init_asm (CGEN_CPU_DESC cd)
{
iq2000_cgen_init_opcode_table (cd);
iq2000_cgen_init_ibld_table (cd);
@@ -859,30 +849,3 @@ iq2000_cgen_assemble_insn (CGEN_CPU_DESC cd,
return NULL;
}
}
#if 0 /* This calls back to GAS which we can't do without care. */
/* Record each member of OPVALS in the assembler's symbol table.
This lets GAS parse registers for us.
??? Interesting idea but not currently used. */
/* Record each member of OPVALS in the assembler's symbol table.
FIXME: Not currently used. */
void
iq2000_cgen_asm_hash_keywords (CGEN_CPU_DESC cd, CGEN_KEYWORD *opvals)
{
CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
const CGEN_KEYWORD_ENTRY * ke;
while ((ke = cgen_keyword_search_next (& search)) != NULL)
{
#if 0 /* Unnecessary, should be done in the search routine. */
if (! iq2000_cgen_opval_supported (ke))
continue;
#endif
cgen_asm_record_register (cd, ke->name, ke->value);
}
}
#endif /* 0 */