mirror of
https://github.com/bminor/binutils-gdb.git
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* Makefile.in: Add Timer A support.
* cpu.h (m32c_opcode_pc): New. (in_gdb): New. * gdb-if.c (sim_open): Add Timer A support. Support unbuffered console. * int.c (trigger_interrupt): Manage the U flag properly. (trigger_based_interrupt): Likewise. (trigger_fixed_interrupt): New. (trigger_peripheral_interrupt): New. * int.h (trigger_peripheral_interrupt): New. * m32c.opc: Use m32c_opcode_pc throughout, as needed. (decode_m32c): Detect jump-to-zero with traceback. (BRK): Try to do the right thing, keeping track of whether we're in gdb or not, and if the user has provided a handler or not. (GBRK): Alternate break opcode for gdb, in case the user's app needs to use BRK for itself. (BRK2): Implement. * main.c: Add Timer A support. Support TCP-based console. (setup_tcp_console): New. (main): Add Timer A support. Support TCP-based console. * mem.c: Add Timer A support. Support TCP-based console. (mem_ptr): Enhance NULL pointer detection. (stdin_ready): New. (m32c_sim_restore_console): New. (mem_get_byte): Check for console input ready. (update_timer_a): New. * r8c.opc (SSTR): Use r0l, not r0h. (REIT): Fix return frame logic. * reg.c (print_flags): New. (trace_register_changes): Use it. (m32c_dump_all_registers): New. * timer_a.h: New. * load.c: Fix indentation. * trace.c: Fix indentation. * trace.h: Fix indentation.
This commit is contained in:
232
sim/m32c/mem.c
232
sim/m32c/mem.c
@@ -22,11 +22,21 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <ctype.h>
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#include <sys/time.h>
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#include <sys/types.h>
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#include <unistd.h>
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#include <sys/select.h>
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#include <termios.h>
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#include "mem.h"
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#include "cpu.h"
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#include "syscalls.h"
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#include "misc.h"
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#ifdef TIMER_A
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#include "int.h"
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#include "timer_a.h"
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#endif
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#define L1_BITS (10)
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#define L2_BITS (10)
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@@ -38,8 +48,15 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
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static unsigned char **pt[L1_LEN];
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int m32c_console_ifd = 0;
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int m32c_console_ofd = 1;
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#ifdef TIMER_A
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Timer_A timer_a;
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#endif
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/* [ get=0/put=1 ][ byte size ] */
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static unsigned int mem_counters[2][4];
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static unsigned int mem_counters[2][5];
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#define COUNT(isput,bytes) \
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if (verbose && enable_counting) mem_counters[isput][bytes]++
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@@ -64,14 +81,23 @@ init_mem (void)
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static unsigned char *
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mem_ptr (address)
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{
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static int recursing = 0;
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int pt1 = (address >> (L2_BITS + OFF_BITS)) & ((1 << L1_BITS) - 1);
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int pt2 = (address >> OFF_BITS) & ((1 << L2_BITS) - 1);
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int pto = address & ((1 << OFF_BITS) - 1);
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if (address == 0)
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if (address == 0 && !recursing)
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{
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printf ("NULL pointer dereference\n");
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recursing = 1;
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put_reg (pc, m32c_opcode_pc);
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printf ("NULL pointer dereference at pc=0x%x\n", get_reg (pc));
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step_result = M32C_MAKE_HIT_BREAK ();
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#if 0
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/* This code can be re-enabled to help diagnose NULL pointer
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bugs that aren't debuggable in GDB. */
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m32c_dump_all_registers ();
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exit (1);
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#endif
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}
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if (pt[pt1] == 0)
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@@ -138,7 +164,7 @@ mem_usage_stats ()
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/* mem foo: 123456789012 123456789012 123456789012 123456789012
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123456789012 */
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printf (" byte short pointer long"
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" fetch\n");
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" fetch\n");
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printf ("mem get: %12s %12s %12s %12s %12s\n", mcs (0, 1), mcs (0, 2),
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mcs (0, 3), mcs (0, 4), mcs (0, 0));
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printf ("mem put: %12s %12s %12s %12s\n", mcs (1, 1), mcs (1, 2),
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@@ -167,6 +193,8 @@ e ()
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#define E() if (trace) e()
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extern int m32c_disassemble;
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void
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mem_put_byte (int address, unsigned char value)
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{
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@@ -199,21 +227,65 @@ mem_put_byte (int address, unsigned char value)
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}
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}
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break;
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#ifdef TIMER_A
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/* M32C Timer A */
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case 0x346: /* TA0low */
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timer_a.count = (timer_a.count & 0xff00) | value;
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timer_a.reload = timer_a.count;
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break;
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case 0x347: /* TA0high */
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timer_a.count = (timer_a.count & 0x00ff) | (value << 8);
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timer_a.reload = timer_a.count;
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break;
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case 0x340: /* TABSR */
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timer_a.bsr = value;
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break;
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case 0x356: /* TA0MR */
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timer_a.mode = value;
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break;
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case 0x35f: /* TCSPR */
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timer_a.tcspr = value;
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break;
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case 0x006c: /* TA0IC */
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timer_a.ic = value;
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break;
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case 0x3aa: /* uart1tx */
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/* R8C Timer RA */
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case 0x100: /* TRACR */
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timer_a.bsr = value;
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break;
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case 0x102: /* TRAMR */
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timer_a.mode = value;
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break;
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case 0x104: /* TRA */
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timer_a.count = value;
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timer_a.reload = value;
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break;
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case 0x103: /* TRAPRE */
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timer_a.tcspr = value;
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break;
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case 0x0056: /* TA0IC */
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timer_a.ic = value;
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break;
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#endif
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case 0x2ea: /* m32c uart1tx */
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case 0x3aa: /* m16c uart1tx */
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{
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static int pending_exit = 0;
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if (value == 0)
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{
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if (pending_exit)
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{
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step_result = M32C_MAKE_EXITED(value);
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step_result = M32C_MAKE_EXITED (value);
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return;
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}
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pending_exit = 1;
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}
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else
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putchar(value);
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{
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write (m32c_console_ofd, &value, 1);
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}
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}
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break;
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@@ -301,24 +373,94 @@ mem_get_pc ()
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return *m;
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}
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static int console_raw = 0;
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static struct termios attr, oattr;
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static int
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stdin_ready ()
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{
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fd_set ifd;
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int n;
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struct timeval t;
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t.tv_sec = 0;
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t.tv_usec = 0;
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FD_ZERO (&ifd);
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FD_SET (m32c_console_ifd, &ifd);
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n = select (1, &ifd, 0, 0, &t);
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return n > 0;
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}
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void
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m32c_sim_restore_console ()
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{
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tcsetattr (m32c_console_ifd, TCSANOW, &oattr);
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console_raw = 0;
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}
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static unsigned char
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mem_get_byte (int address)
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{
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unsigned char *m;
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address &= membus_mask;
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S ("=>");
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m = mem_ptr (address);
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switch (address)
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{
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case 0x3ad: /* uart1c1 */
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E();
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return 2; /* transmitter empty */
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break;
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default:
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if (trace)
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printf (" %02x", *m);
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break;
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case 0x2ed: /* m32c uart1c1 */
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case 0x3ad: /* m16c uart1c1 */
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#if 0
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if (!console_raw)
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{
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tcgetattr (m32c_console_ifd, &attr);
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tcgetattr (m32c_console_ifd, &oattr);
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/* We want each key to be sent as the user presses them. */
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attr.c_lflag &= ~(ICANON | ECHO | ECHOE);
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tcsetattr (m32c_console_ifd, TCSANOW, &attr);
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console_raw = 1;
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atexit (m32c_sim_restore_console);
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}
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#endif
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if (stdin_ready ())
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return 0x02; /* tx empty and rx full */
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else
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return 0x0a; /* transmitter empty */
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case 0x2ee: /* m32c uart1 rx */
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{
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char c;
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read (m32c_console_ifd, &c, 1);
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if (m32c_console_ifd == 0 && c == 3) /* Ctrl-C */
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{
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printf ("Ctrl-C!\n");
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exit (0);
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}
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if (m32c_console_ifd != 1)
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{
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if (isgraph (c))
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printf ("\033[31m%c\033[0m", c);
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else
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printf ("\033[31m%02x\033[0m", c);
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}
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return c;
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}
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#ifdef TIMER_A
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case 0x346: /* TA0low */
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return timer_a.count & 0xff;
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case 0x347: /* TA0high */
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return (timer_a.count >> 8) & 0xff;
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case 0x104: /* TRA */
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return timer_a.count;
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#endif
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}
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S ("=>");
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if (trace)
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printf (" %02x", *m);
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E ();
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return *m;
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}
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@@ -395,3 +537,61 @@ sign_ext (int v, int bits)
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}
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return v;
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}
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#if TIMER_A
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void
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update_timer_a ()
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{
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if (timer_a.bsr & 1)
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{
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timer_a.prescale--;
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if (timer_a.prescale < 0)
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{
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if (A24)
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{
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switch (timer_a.mode & 0xc0)
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{
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case 0x00:
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timer_a.prescale = 0;
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break;
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case 0x40:
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timer_a.prescale = 8;
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break;
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case 0x80:
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timer_a.prescale = timer_a.tcspr & 0x0f;
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break;
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case 0xc0:
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timer_a.prescale = 32;
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break;
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}
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}
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else
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{
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timer_a.prescale = timer_a.tcspr;
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}
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timer_a.count--;
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if (timer_a.count < 0)
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{
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timer_a.count = timer_a.reload;
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if (timer_a.ic & 7)
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{
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if (A24)
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mem_put_qi (0x6c, timer_a.ic | 0x08);
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else
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mem_put_qi (0x56, timer_a.ic | 0x08);
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}
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}
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}
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}
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if (regs.r_flags & FLAGBIT_I /* interrupts enabled */
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&& timer_a.ic & 0x08 /* timer A interrupt triggered */
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&& (timer_a.ic & 0x07) > ((regs.r_flags >> 12) & 0x07))
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{
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if (A24)
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trigger_peripheral_interrupt (12, 0x06c);
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else
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trigger_peripheral_interrupt (22, 0x056);
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}
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}
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#endif
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