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Mon Aug 11 16:22:36 1997 Geoffrey Noer <noer@cygnus.com>
* ocd.c (ocd_insert_breakpoint, ocd_remove_breakpoint): macro
BDM_BREAKPOINT already has braces around it, remove erroneous ones.
* ser-ocd.c (ocd_write): conditionalize on _WIN32 instead of
__CYGWIN32__
* config/powerpc/tm-ppc-eabi.h: remove BDM_NUM_REGS, BDM_REGMAP
* ppc-bdm.c: move BDM_NUM_REGS, BDM_REGMAP here from tm.h file,
fill in doc fields of bdm_ppc_ops.
(bdm_ppc_fetch_registers): don't ask for invalid registers such
as the MQ or floating point regs not present on ppc 8xx boards
(bdm_ppc_store_registers): don't write those same invalid registers
* config/i386/cygwin32.mh: stop including ocd.o ser-ocd.o
* config/powerpc/ppc-eabi.mt:
* config/powerpc/ppcle-eabi.mt:
* config/powerpc/ppc-sim.mt:
* config/powerpc/ppcle-sim.mt: include ser-ocd.o
This commit is contained in:
@@ -1278,13 +1278,12 @@ ocd_load (args, from_tty)
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clear_symtab_users ();
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}
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/* This should be defined in each targets tm.h file */
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/* This should be defined for each target */
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/* But we want to be able to compile this file for some configurations
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not yet supported fully */
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#ifndef BDM_BREAKPOINT
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#define BDM_BREAKPOINT {0x0,0x0,0x0,0x0} /* For ppc 8xx */
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#endif
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/* #define BDM_BREAKPOINT {0x4a,0xfa} /* BGND insn used for CPU32 */
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/* BDM (at least on CPU32) uses a different breakpoint */
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@@ -1293,7 +1292,7 @@ ocd_insert_breakpoint (addr, contents_cache)
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CORE_ADDR addr;
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char *contents_cache;
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{
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static char break_insn[] = {BDM_BREAKPOINT};
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static char break_insn[] = BDM_BREAKPOINT;
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int val;
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val = target_read_memory (addr, contents_cache, sizeof (break_insn));
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@@ -1309,7 +1308,7 @@ ocd_remove_breakpoint (addr, contents_cache)
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CORE_ADDR addr;
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char *contents_cache;
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{
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static char break_insn[] = {BDM_BREAKPOINT};
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static char break_insn[] = BDM_BREAKPOINT;
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int val;
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val = target_write_memory (addr, contents_cache, sizeof (break_insn));
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