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opcodes: don't assume ELF in riscv, csky, rl78, mep disassemblers

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Currently, the get_disassembler() implementations for riscv, csky, and
rl78--and mep_print_insn() for mep--access ELF variants of union fields
without first checking that the bfd actually represents an ELF.  This
causes undefined behavior and crashes when disassembling non-ELF files
(the "binary" BFD, for example).  Fix that.
This commit is contained in:
Thomas Hebb
2022-04-29 21:17:58 -07:00
committed by Alan Modra
parent 2e920d702b
commit 16089f320a
5 changed files with 30 additions and 28 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
cpu/mep.opc
View File

@@ -1451,6 +1451,8 @@ mep_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
if (info->section && info->section->owner) if (info->section && info->section->owner)
{ {
bfd *abfd = info->section->owner; bfd *abfd = info->section->owner;
if (bfd_get_flavour (abfd) == bfd_target_elf_flavour)
{
mep_config_index = abfd->tdata.elf_obj_data->elf_header->e_flags & EF_MEP_INDEX_MASK; mep_config_index = abfd->tdata.elf_obj_data->elf_header->e_flags & EF_MEP_INDEX_MASK;
/* This instantly redefines MEP_CONFIG, MEP_OMASK, .... MEP_VLIW64 */ /* This instantly redefines MEP_CONFIG, MEP_OMASK, .... MEP_VLIW64 */
@@ -1458,6 +1460,7 @@ mep_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
if (cop_type == EF_MEP_COP_IVC2) if (cop_type == EF_MEP_COP_IVC2)
ivc2 = 1; ivc2 = 1;
} }
}
/* Picking the right ISA bitmask for the current context is tricky. */ /* Picking the right ISA bitmask for the current context is tricky. */
if (info->section) if (info->section)

2
opcodes/csky-dis.c
View File

@@ -239,7 +239,7 @@ csky_get_disassembler (bfd *abfd)
{ {
obj_attribute *attr; obj_attribute *attr;
const char *sec_name = NULL; const char *sec_name = NULL;
if (!abfd) if (!abfd || bfd_get_flavour (abfd) != bfd_target_elf_flavour)
dis_info.isa = CSKY_DEFAULT_ISA; dis_info.isa = CSKY_DEFAULT_ISA;
else else
{ {

3
opcodes/mep-dis.c
View File

@@ -647,6 +647,8 @@ mep_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
if (info->section && info->section->owner) if (info->section && info->section->owner)
{ {
bfd *abfd = info->section->owner; bfd *abfd = info->section->owner;
if (bfd_get_flavour (abfd) == bfd_target_elf_flavour)
{
mep_config_index = abfd->tdata.elf_obj_data->elf_header->e_flags & EF_MEP_INDEX_MASK; mep_config_index = abfd->tdata.elf_obj_data->elf_header->e_flags & EF_MEP_INDEX_MASK;
/* This instantly redefines MEP_CONFIG, MEP_OMASK, .... MEP_VLIW64 */ /* This instantly redefines MEP_CONFIG, MEP_OMASK, .... MEP_VLIW64 */
@@ -654,6 +656,7 @@ mep_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
if (cop_type == EF_MEP_COP_IVC2) if (cop_type == EF_MEP_COP_IVC2)
ivc2 = 1; ivc2 = 1;
} }
}
/* Picking the right ISA bitmask for the current context is tricky. */ /* Picking the right ISA bitmask for the current context is tricky. */
if (info->section) if (info->section)

8
opcodes/riscv-dis.c
View File

@@ -1002,12 +1002,9 @@ riscv_get_disassembler (bfd *abfd)
{ {
const char *default_arch = "rv64gc"; const char *default_arch = "rv64gc";
if (abfd) if (abfd && bfd_get_flavour (abfd) == bfd_target_elf_flavour)
{ {
const struct elf_backend_data *ebd = get_elf_backend_data (abfd); const char *sec_name = get_elf_backend_data (abfd)->obj_attrs_section;
if (ebd)
{
const char *sec_name = ebd->obj_attrs_section;
if (bfd_get_section_by_name (abfd, sec_name) != NULL) if (bfd_get_section_by_name (abfd, sec_name) != NULL)
{ {
obj_attribute *attr = elf_known_obj_attributes_proc (abfd); obj_attribute *attr = elf_known_obj_attributes_proc (abfd);
@@ -1021,7 +1018,6 @@ riscv_get_disassembler (bfd *abfd)
default_arch = attr[Tag_RISCV_arch].s; default_arch = attr[Tag_RISCV_arch].s;
} }
} }
}
riscv_release_subset_list (&riscv_subsets); riscv_release_subset_list (&riscv_subsets);
riscv_parse_subset (&riscv_rps_dis, default_arch); riscv_parse_subset (&riscv_rps_dis, default_arch);

2
opcodes/rl78-dis.c
View File

@@ -408,7 +408,7 @@ rl78_get_disassembler (bfd *abfd)
{ {
int cpu = E_FLAG_RL78_ANY_CPU; int cpu = E_FLAG_RL78_ANY_CPU;
if (abfd != NULL) if (abfd != NULL && bfd_get_flavour (abfd) == bfd_target_elf_flavour)
cpu = abfd->tdata.elf_obj_data->elf_header->e_flags & E_FLAG_RL78_CPU_MASK; cpu = abfd->tdata.elf_obj_data->elf_header->e_flags & E_FLAG_RL78_CPU_MASK;
switch (cpu) switch (cpu)