arc: Add new ARCv3 ISA to BFD.

The new Synopsys's ARCv3 ISA is capable to run either 64-bit or
32-bit ISA.  The new 32-bit ISA is not compatible with the old
Synopsys ARCv1/ARCv2 ISA, however, it retains a lot of common
concepts.  Thus, this patch is reusing the old ARC BFD backend and
adds the necessary bits for the new architecture in a similar way as
it is done for RISCV backend.

bfd/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>
	    Cupertino Miranda  <cupertinomiranda@gmail.com>

	* bfd/Makefile.am: Add ARC64 files.
	* bfd/Makefile.in: Regerate.
	* bfd/arc-got.h (TCB_SIZE): Depends on the target architecture.
	(GOT_ENTRY_SIZE): New define.
	(write_in_got): Likewise.
	(read_from_got): Likewise.
	(align_power): Likewise.
	(arc_got_entry_type_for_reloc): Use RELA_SIZE and GOT_ENTRY_SIZE.
	(arc_fill_got_info_for_reloc): Update formating.
	(relocate_fix_got_relocs_for_got_info): Likewise.
	(arc_static_sym_data): Deleted structure.
	(get_static_sym_data): Deleted function.
	(relocate_fix_got_relocs_for_got_info): Use symbol static data.
	(create_got_dynrelocs_for_single_entry): Update formating.
	(create_got_dynrelocs_for_got_info): Likewise.
	* bfd/arc-plt.c: New file.
	* bfd/arc-plt.def: Add ARC64 PLT entry.
	* bfd/arc-plt.h: Clean it up, move functionality to arc-plt.c file.
	* bfd/archures.c: Add ARC64 target.
	* bfd/config.bfd: Likewise.
	* bfd/configure.ac: Likewise.
	* bfd/bfd-in2.h: Regenerate.
	* bfd/configure: Likewise.
	* bfd/libbfd.h: Likewise.
	* bfd/cpu-arc.c: Clean it up.
	* bfd/cpu-arc64.c: New file.
	* bfd/elf32-arc.c: Renamed to elfnn-arc.c.
	* bfd/elfnn-arc.c: New file.
	* bfd/reloc.c: Add new ARC64 relocs.
	* bfd/targets.c: Add ARC64 target.

Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>

bfd/Makefile.am

@@ -99,6 +99,7 @@ ALL_MACHINES = \
 	cpu-alpha.lo \
 	cpu-amdgcn.lo \
 	cpu-arc.lo \
+	cpu-arc64.lo \
 	cpu-arm.lo \
 	cpu-avr.lo \
 	cpu-bfin.lo \
@@ -183,6 +184,7 @@ ALL_MACHINES_CFILES = \
 	cpu-alpha.c \
 	cpu-amdgcn.c \
 	cpu-arc.c \
+	cpu-arc64.c \
 	cpu-arm.c \
 	cpu-avr.c \
 	cpu-bfin.c \
@@ -265,6 +267,7 @@ ALL_MACHINES_CFILES = \
 # The .o files needed by all of the 32 bit vectors that are configured into
 # target_vector in targets.c if configured with --enable-targets=all.
 BFD32_BACKENDS = \
+	arc-plt.lo \
 	aout-cris.lo \
 	aout-ns32k.lo \
 	aout32.lo \
@@ -400,6 +403,7 @@ BFD32_BACKENDS = \
 	xtensa-modules.lo
 
 BFD32_BACKENDS_CFILES = \
+	arc-plt.c \
 	aout-cris.c \
 	aout-ns32k.c \
 	aout32.c \
@@ -432,7 +436,6 @@ BFD32_BACKENDS_CFILES = \
 	elf-vxworks.c \
 	elf.c \
 	elf32-am33lin.c \
-	elf32-arc.c \
 	elf32-arm.c \
 	elf32-avr.c \
 	elf32-bfin.c \
@@ -545,6 +548,7 @@ BFD64_BACKENDS = \
 	coff-x86_64.lo \
 	coff64-rs6000.lo \
 	elf32-aarch64.lo \
+	elf32-arc64.lo \
 	elf32-ia64.lo \
 	elf32-kvx.lo \
 	elf32-loongarch.lo \
@@ -553,6 +557,7 @@ BFD64_BACKENDS = \
 	elf32-score.lo \
 	elf32-score7.lo \
 	elf64-aarch64.lo \
+	elf64-arc64.lo \
 	elf64-alpha.lo \
 	elf64-amdgcn.lo \
 	elf64-bpf.lo \
@@ -687,6 +692,7 @@ SOURCE_CFILES = \
 
 BUILD_CFILES = \
 	elf32-aarch64.c elf64-aarch64.c \
+	elf32-arc.c elf64-arc64.c elf32-arc64.c\
 	elf32-kvx.c elf64-kvx.c \
 	elf32-ia64.c elf64-ia64.c \
 	elf32-loongarch.c elf64-loongarch.c \
@@ -849,6 +855,21 @@ elf64-aarch64.c : elfnn-aarch64.c
 	$(AM_V_at)echo "#line 1 \"$<\"" > $@
 	$(AM_V_GEN)$(SED) -e s/NN/64/g < $< >> $@
 
+elf32-arc.c : elfnn-arc.c
+	rm -f elf32-arc.c
+	$(AM_V_at)echo "#line 1 \"$(srcdir)/elfnn-arc.c\"" > $@
+	$(AM_V_GEN)$(SED) -e s/NN/32/g -e s/AA//g < $< >> $@
+
+elf64-arc64.c : elfnn-arc.c
+	rm -f elf64-arc64.c
+	$(AM_V_at)echo "#line 1 \"$(srcdir)/elfnn-arc.c\"" > $@
+	$(AM_V_GEN)$(SED) -e s/NN/64/g -e s/AA/64/g < $< >> $@
+
+elf32-arc64.c : elfnn-arc.c
+	rm -f elf32-arc64.c
+	$(AM_V_at)echo "#line 1 \"$(srcdir)/elfnn-arc.c\"" > $@
+	$(AM_V_GEN)$(SED) -e s/NN/32/g -e s/AA/64/g < $< >> $@
+
 elf32-ia64.c : elfnn-ia64.c
 	$(AM_V_at)echo "#line 1 \"$<\"" > $@
 	$(AM_V_GEN)$(SED) -e s/NN/32/g < $< >> $@

bfd/Makefile.in

@@ -554,6 +554,7 @@ ALL_MACHINES = \
 	cpu-alpha.lo \
 	cpu-amdgcn.lo \
 	cpu-arc.lo \
+	cpu-arc64.lo \
 	cpu-arm.lo \
 	cpu-avr.lo \
 	cpu-bfin.lo \
@@ -638,6 +639,7 @@ ALL_MACHINES_CFILES = \
 	cpu-alpha.c \
 	cpu-amdgcn.c \
 	cpu-arc.c \
+	cpu-arc64.c \
 	cpu-arm.c \
 	cpu-avr.c \
 	cpu-bfin.c \
@@ -721,6 +723,7 @@ ALL_MACHINES_CFILES = \
 # The .o files needed by all of the 32 bit vectors that are configured into
 # target_vector in targets.c if configured with --enable-targets=all.
 BFD32_BACKENDS = \
+	arc-plt.lo \
 	aout-cris.lo \
 	aout-ns32k.lo \
 	aout32.lo \
@@ -856,6 +859,7 @@ BFD32_BACKENDS = \
 	xtensa-modules.lo
 
 BFD32_BACKENDS_CFILES = \
+	arc-plt.c \
 	aout-cris.c \
 	aout-ns32k.c \
 	aout32.c \
@@ -888,7 +892,6 @@ BFD32_BACKENDS_CFILES = \
 	elf-vxworks.c \
 	elf.c \
 	elf32-am33lin.c \
-	elf32-arc.c \
 	elf32-arm.c \
 	elf32-avr.c \
 	elf32-bfin.c \
@@ -1002,6 +1005,7 @@ BFD64_BACKENDS = \
 	coff-x86_64.lo \
 	coff64-rs6000.lo \
 	elf32-aarch64.lo \
+	elf32-arc64.lo \
 	elf32-ia64.lo \
 	elf32-kvx.lo \
 	elf32-loongarch.lo \
@@ -1010,6 +1014,7 @@ BFD64_BACKENDS = \
 	elf32-score.lo \
 	elf32-score7.lo \
 	elf64-aarch64.lo \
+	elf64-arc64.lo \
 	elf64-alpha.lo \
 	elf64-amdgcn.lo \
 	elf64-bpf.lo \
@@ -1143,6 +1148,7 @@ SOURCE_CFILES = \
 
 BUILD_CFILES = \
 	elf32-aarch64.c elf64-aarch64.c \
+	elf32-arc.c elf32-arc64.c elf64-arc64.c \
 	elf32-kvx.c elf64-kvx.c \
 	elf32-ia64.c elf64-ia64.c \
 	elf32-loongarch.c elf64-loongarch.c \
@@ -1435,6 +1441,7 @@ distclean-compile:
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/aout-ns32k.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/aout32.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/aout64.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/arc-plt.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/archive.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/archive64.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/archures.Plo@am__quote@
@@ -1468,6 +1475,7 @@ distclean-compile:
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-alpha.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-amdgcn.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-arc.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-arc64.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-arm.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-avr.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-bfin.Plo@am__quote@
@@ -1564,6 +1572,7 @@ distclean-compile:
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-aarch64.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-am33lin.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-arc.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-arc64.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-arm.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-avr.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-bfin.Plo@am__quote@
@@ -1633,6 +1642,7 @@ distclean-compile:
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-aarch64.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-alpha.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-amdgcn.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-arc64.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-bpf.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-gen.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-hppa.Plo@am__quote@
@@ -2351,6 +2361,21 @@ elf64-aarch64.c : elfnn-aarch64.c
 	$(AM_V_at)echo "#line 1 \"$<\"" > $@
 	$(AM_V_GEN)$(SED) -e s/NN/64/g < $< >> $@
 
+elf32-arc.c : elfnn-arc.c
+	rm -f elf32-arc.c
+	$(AM_V_at)echo "#line 1 \"$(srcdir)/elfnn-arc.c\"" > $@
+	$(AM_V_GEN)$(SED) -e s/NN/32/g -e s/AA//g < $< >> $@
+
+elf64-arc64.c : elfnn-arc.c
+	rm -f elf64-arc64.c
+	$(AM_V_at)echo "#line 1 \"$(srcdir)/elfnn-arc.c\"" > $@
+	$(AM_V_GEN)$(SED) -e s/NN/64/g -e s/AA/64/g < $< >> $@
+
+elf32-arc64.c : elfnn-arc.c
+	rm -f elf32-arc64.c
+	$(AM_V_at)echo "#line 1 \"$(srcdir)/elfnn-arc.c\"" > $@
+	$(AM_V_GEN)$(SED) -e s/NN/32/g -e s/AA/64/g < $< >> $@
+
 elf32-ia64.c : elfnn-ia64.c
 	$(AM_V_at)echo "#line 1 \"$<\"" > $@
 	$(AM_V_GEN)$(SED) -e s/NN/32/g < $< >> $@

bfd/arc-got.h

@@ -22,7 +22,23 @@
 #ifndef ARC_GOT_H
 #define ARC_GOT_H
 
+/* Thread Control Block (TCB) contains at offset zero a pointer to the
+   dynamic thread vector dtvt for the thread.  */
+#if ARCH_SIZE == 32
 #define TCB_SIZE (8)
+#else
+#define TCB_SIZE (16)
+#endif
+
+#if ARCH_SIZE == 32
+#define GOT_ENTRY_SIZE 4
+#define write_in_got(A, B, C) bfd_put_32 (A, B, C)
+#define read_from_got(A, B) bfd_get_32 (A, B)
+#else
+#define GOT_ENTRY_SIZE 8
+#define write_in_got(A, B, C) bfd_put_64 (A, B, C)
+#define read_from_got(A, B) bfd_get_64 (A, B)
+#endif
 
 #define	align_power(addr, align)					\
   (((addr) + ((bfd_vma) 1 << (align)) - 1) & (-((bfd_vma) 1 << (align))))
@@ -201,7 +217,7 @@ arc_got_entry_type_for_reloc (reloc_howto_type *howto)
   {									\
     if (COND_FOR_RELOC)							\
       {									\
-	htab->srel##SECNAME->size += sizeof (Elf32_External_Rela);	\
+	htab->srel##SECNAME->size += RELA_SIZE;				\
 	  ARC_DEBUG ("arc_info: Added reloc space in "			\
 		     #SECNAME " section at " __FILE__			\
 		     ":%d for symbol %s\n",				\
@@ -211,7 +227,7 @@ arc_got_entry_type_for_reloc (reloc_howto_type *howto)
       if (H->dynindx == -1 && !H->forced_local)				\
 	if (! bfd_elf_link_record_dynamic_symbol (info, H))		\
 	  return false;							\
-     htab->s##SECNAME->size += 4;					\
+     htab->s##SECNAME->size += GOT_ENTRY_SIZE;				\
    }									\
 
 static bool
@@ -230,13 +246,13 @@ arc_fill_got_info_for_reloc (enum tls_type_e type,
       case GOT_NORMAL:
 	{
 	  bfd_vma offset
-	    = ADD_SYMBOL_REF_SEC_AND_RELOC (got, bfd_link_pic (info)
+	    = ADD_SYMBOL_REF_SEC_AND_RELOC (got,
-						 || h != NULL, h);
+					    bfd_link_pic (info) || h != NULL,
+					    h);
 	  new_got_entry_to_list (list, type, offset, TLS_GOT_NONE);
 	}
 	break;
 
-
       case GOT_TLS_GD:
 	{
 	  bfd_vma offset
@@ -262,59 +278,16 @@ arc_fill_got_info_for_reloc (enum tls_type_e type,
   return true;
 }
 
-struct arc_static_sym_data {
+static bfd_vma
-  bfd_vma sym_value;
+relocate_fix_got_relocs_for_got_info (struct got_entry **list_p,
-  const char *symbol_name;
+				      enum tls_type_e type,
-};
+				      struct bfd_link_info *info,
-
+				      bfd *output_bfd,
-static struct arc_static_sym_data
+				      unsigned long r_symndx,
-get_static_sym_data (unsigned long  r_symndx,
+				      Elf_Internal_Sym * local_syms,
-		     Elf_Internal_Sym  *local_syms,
 				      asection **local_sections,
 				      struct elf_link_hash_entry *h,
 				      struct arc_relocation_data *reloc_data)
-{
-  static const char local_name[] = "(local)";
-  struct arc_static_sym_data ret = { 0, NULL };
-
-  if (h != NULL)
-    {
-      BFD_ASSERT (h->root.type != bfd_link_hash_undefweak
-		  && h->root.type != bfd_link_hash_undefined);
-      /* TODO: This should not be here.  */
-      reloc_data->sym_value = h->root.u.def.value;
-      reloc_data->sym_section = h->root.u.def.section;
-
-      ret.sym_value = h->root.u.def.value
-	+ h->root.u.def.section->output_section->vma
-	+ h->root.u.def.section->output_offset;
-
-      ret.symbol_name = h->root.root.string;
-    }
-  else
-  {
-    Elf_Internal_Sym *sym = local_syms + r_symndx;
-    asection *sec = local_sections[r_symndx];
-
-    ret.sym_value = sym->st_value
-      + sec->output_section->vma
-      + sec->output_offset;
-
-    ret.symbol_name = local_name;
-  }
-  return ret;
-}
-
-static bfd_vma
-relocate_fix_got_relocs_for_got_info (struct got_entry **	   list_p,
-				      enum tls_type_e		   type,
-				      struct bfd_link_info *	   info,
-				      bfd *			   output_bfd,
-				      unsigned long		   r_symndx,
-				      Elf_Internal_Sym *	   local_syms,
-				      asection **		   local_sections,
-				      struct elf_link_hash_entry * h,
-				      struct arc_relocation_data * reloc_data)
 {
   struct elf_link_hash_table *htab = elf_hash_table (info);
   struct got_entry *entry = NULL;
@@ -332,91 +305,84 @@ relocate_fix_got_relocs_for_got_info (struct got_entry **	   list_p,
 	      && SYMBOL_REFERENCES_LOCAL (info, h))))
     {
       const char ATTRIBUTE_UNUSED *symbol_name;
-      asection *tls_sec = elf_hash_table (info)->tls_sec;
+      static const char *local_name = "(local)";
+      bfd_vma sym_value = 0;
+      asection *sec = NULL;
+
+      if (h != NULL)
+	{
+	  reloc_data->sym_value = h->root.u.def.value;
+	  reloc_data->sym_section = h->root.u.def.section;
+
+	  sec = h->root.u.def.section;
+	  sym_value = h->root.u.def.value;
+	  symbol_name = h->root.root.string;
+	}
+      else
+	{
+	  Elf_Internal_Sym *sym = local_syms + r_symndx;
+
+	  sec = local_sections[r_symndx];
+	  sym_value = sym->st_value;
+	  symbol_name = local_name;
+	}
 
       if (entry && !entry->processed)
 	{
+	  int tcb_size = 0;
+
 	  switch (entry->type)
 	    {
+	    case GOT_TLS_IE:
+	      tcb_size = TCB_SIZE;
+	      /* Fall through.  */
 	    case GOT_TLS_GD:
 	      {
-		BFD_ASSERT (tls_sec && tls_sec->output_section);
+		asection *tls_sec = elf_hash_table (info)->tls_sec;
-		bfd_vma sec_vma = tls_sec->output_section->vma;
 
-		if (h == NULL || h->forced_local
+		BFD_ASSERT (tls_sec && tls_sec->output_section);
+		bfd_vma tls_vma = tls_sec->output_section->vma;
+
+		BFD_ASSERT (sec->output_section);
+		sym_value += sec->output_section->vma + sec->output_offset;
+
+		if (h == NULL
+		    || h->forced_local
 		    || !elf_hash_table (info)->dynamic_sections_created)
 		  {
-		    struct arc_static_sym_data tmp =
+		    write_in_got
-		      get_static_sym_data (r_symndx, local_syms, local_sections,
+		      (output_bfd,
-					   h, reloc_data);
+		       /* S - TLS_REL + { round (TCB_SIZE, align), 0 }  */
-
+		       sym_value - tls_vma
-		    bfd_put_32 (output_bfd,
-			    tmp.sym_value - sec_vma
 		       + (elf_hash_table (info)->dynamic_sections_created
-			       ? 0
+			  ? 0 : (align_power (tcb_size,
-			       : (align_power (0,
 					      tls_sec->alignment_power))),
 		       htab->sgot->contents + entry->offset
 		       + (entry->existing_entries == TLS_GOT_MOD_AND_OFF
-			       ? 4 : 0));
+			  ? GOT_ENTRY_SIZE : 0));
 
-		    ARC_DEBUG ("arc_info: FIXED -> %s value = %#lx "
+		    ARC_DEBUG
+		      ("arc_info: FIXED -> %s value = %#lx "
 		       "@ %lx, for symbol %s\n",
 		       (entry->type == GOT_TLS_GD ? "GOT_TLS_GD" :
 			"GOT_TLS_IE"),
-			  (long) (sym_value - sec_vma),
+		       (long) (sym_value - tls_vma),
 		       (long) (htab->sgot->output_section->vma
 			       + htab->sgot->output_offset
 			       + entry->offset
 			       + (entry->existing_entries == TLS_GOT_MOD_AND_OFF
-				? 4 : 0)),
+				  ? GOT_ENTRY_SIZE : 0)),
-			  tmp.symbol_name);
+		       symbol_name);
 		  }
 	      }
 	      break;
 
-	    case GOT_TLS_IE:
-	      {
-		BFD_ASSERT (tls_sec && tls_sec->output_section);
-		bfd_vma ATTRIBUTE_UNUSED sec_vma
-		  = tls_sec->output_section->vma;
-
-		struct arc_static_sym_data tmp =
-		  get_static_sym_data (r_symndx, local_syms, local_sections,
-				       h, reloc_data);
-
-		bfd_put_32 (output_bfd,
-			    tmp.sym_value - sec_vma
-			    + (elf_hash_table (info)->dynamic_sections_created
-			       ? 0
-			       : (align_power (TCB_SIZE,
-					       tls_sec->alignment_power))),
-			    htab->sgot->contents + entry->offset
-			    + (entry->existing_entries == TLS_GOT_MOD_AND_OFF
-			       ? 4 : 0));
-
-		ARC_DEBUG ("arc_info: FIXED -> %s value = %#lx "
-			   "@ %p, for symbol %s\n",
-			   (entry->type == GOT_TLS_GD ? "GOT_TLS_GD" :
-			    "GOT_TLS_IE"),
-			   (long) (sym_value - sec_vma),
-			   (long) (htab->sgot->output_section->vma
-			      + htab->sgot->output_offset
-			      + entry->offset
-			      + (entry->existing_entries == TLS_GOT_MOD_AND_OFF
-				 ? 4 : 0)),
-			   tmp.symbol_name);
-	      }
-	      break;
-
 	    case GOT_NORMAL:
 	      {
-		bfd_vma sec_vma
-		  = reloc_data->sym_section->output_section->vma
-		  + reloc_data->sym_section->output_offset;
-
 		if (h != NULL
-		    && h->root.type == bfd_link_hash_undefweak)
+		    && (h->root.type == bfd_link_hash_undefweak
+			/* FIXME! catch the undefined situation in a test.  */
+			|| h->root.type == bfd_link_hash_undefined))
 		  ARC_DEBUG ("arc_info: PATCHED: NOT_PATCHED "
 			     "@ %#08lx for sym %s in got offset %#lx "
 			     "(is undefweak)\n",
@@ -427,12 +393,16 @@ relocate_fix_got_relocs_for_got_info (struct got_entry **	   list_p,
 			     (long) entry->offset);
 		else
 		  {
-		    bfd_put_32 (output_bfd,
+		    BFD_ASSERT (sec->output_section);
-				reloc_data->sym_value + sec_vma,
+
+		    sym_value += sec->output_section->vma + sec->output_offset;
+
+		    write_in_got (output_bfd,
+				  sym_value,
 				  htab->sgot->contents + entry->offset);
 		    ARC_DEBUG ("arc_info: PATCHED: %#08lx "
 			       "@ %#08lx for sym %s in got offset %#lx\n",
-			       (long) (reloc_data->sym_value + sec_vma),
+			       (long) sym_value,
 			       (long) (htab->sgot->output_section->vma
 				       + htab->sgot->output_offset
 				       + entry->offset),
@@ -455,7 +425,7 @@ relocate_fix_got_relocs_for_got_info (struct got_entry **	   list_p,
 static void
 create_got_dynrelocs_for_single_entry (struct got_entry *list,
 				       bfd *output_bfd,
-				       struct bfd_link_info *  info,
+				       struct bfd_link_info *info,
 				       struct elf_link_hash_entry *h)
 {
   if (list == NULL)
@@ -474,8 +444,8 @@ create_got_dynrelocs_for_single_entry (struct got_entry *list,
 	  ADD_RELA (output_bfd, got, got_offset, 0, R_ARC_RELATIVE, 0);
 	}
       /* Do not fully understand the side effects of this condition.
-	 The relocation space might still being reserved.  Perhaps
+	 The relocation space might still being reserved.  Perhaps I
-	 I should clear its value.  */
+	 should clear its value.  */
       else if (h != NULL && h->dynindx != -1)
 	{
 	  ADD_RELA (output_bfd, got, got_offset, h->dynindx, R_ARC_GLOB_DAT, 0);
@@ -516,12 +486,12 @@ GOT_OFFSET = %#lx, GOT_VMA = %#lx, INDEX = %ld, ADDEND = 0x0\n",
 	  bfd_vma addend = 0;
 	  if (list->type == GOT_TLS_IE)
 	  {
-	    addend = bfd_get_32 (output_bfd,
+	    addend = read_from_got (output_bfd,
 				    htab->sgot->contents + got_offset);
 	  }
 
-	  ADD_RELA (output_bfd, got,
+	  ADD_RELA (output_bfd, got, got_offset
-		    got_offset + (e == TLS_GOT_MOD_AND_OFF ? 4 : 0),
+		    + (e == TLS_GOT_MOD_AND_OFF ? GOT_ENTRY_SIZE : 0),
 		    dynindx,
 		    (list->type == GOT_TLS_IE ? R_ARC_TLS_TPOFF
 					      : R_ARC_TLS_DTPOFF),
@@ -542,13 +512,14 @@ GOT_OFFSET = %#lx, GOT_VMA = %#lx, INDEX = %ld, ADDEND = %#lx\n",
 static void
 create_got_dynrelocs_for_got_info (struct got_entry **list_p,
 				   bfd *output_bfd,
-				   struct bfd_link_info *  info,
+				   struct bfd_link_info *info,
 				   struct elf_link_hash_entry *h)
 {
+  struct got_entry *list = *list_p;
+
   if (list_p == NULL)
     return;
 
-  struct got_entry *list = *list_p;
   /* Traverse the list of got entries for this symbol.  */
   while (list)
     {

bfd/arc-plt.c

@@ -0,0 +1,121 @@
+/* ARC-specific support for PLT relocations.
+   Copyright (C) 2023 Free Software Foundation, Inc.
+   Contributed by Cupertino Miranda (cmiranda@synopsys.com).
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#include "arc-plt.h"
+
+#define PLT_TYPE_START(NAME)			\
+  const insn_hword NAME##_plt_entry[] = {
+#define PLT_TYPE_END(NAME) };
+#define PLT_ENTRY(...) __VA_ARGS__,
+#define PLT_ELEM(...)
+#define ENTRY_RELOC(...)
+#define ELEM_RELOC(...)
+
+#include "arc-plt.def"
+
+#undef PLT_TYPE_START
+#undef PLT_TYPE_END
+#undef PLT_ENTRY
+#undef PLT_ELEM
+#undef ENTRY_RELOC
+#undef ELEM_RELOC
+
+#define PLT_TYPE_START(NAME)				\
+  const struct plt_reloc NAME##_plt_entry_relocs[] = {
+#define PLT_TYPE_END(NAME)   \
+  {0, 0, 0, LAST_RELOC, 0}   \
+  };
+#define PLT_ENTRY(...)
+#define PLT_ELEM(...)
+#define ENTRY_RELOC(...) { __VA_ARGS__ },
+#define ELEM_RELOC(...)
+
+#include "arc-plt.def"
+
+#undef PLT_TYPE_START
+#undef PLT_TYPE_END
+#undef PLT_ENTRY
+#undef PLT_ELEM
+#undef ENTRY_RELOC
+#undef ELEM_RELOC
+
+
+#define PLT_TYPE_START(NAME)			\
+  const insn_hword NAME##_plt_elem[] = {
+#define PLT_TYPE_END(NAME) };
+#define PLT_ENTRY(...)
+#define PLT_ELEM(...) __VA_ARGS__,
+#define ENTRY_RELOC(...)
+#define ELEM_RELOC(...)
+
+#include "arc-plt.def"
+
+#undef PLT_TYPE_START
+#undef PLT_TYPE_END
+#undef PLT_ENTRY
+#undef PLT_ELEM
+#undef ENTRY_RELOC
+#undef ELEM_RELOC
+
+#define PLT_TYPE_START(NAME)				\
+  const struct plt_reloc NAME##_plt_elem_relocs[] = {
+#define PLT_TYPE_END(NAME)   \
+  {0, 0, 0, LAST_RELOC, 0}   \
+  };
+#define PLT_ENTRY(...)
+#define PLT_ELEM(...)
+#define ENTRY_RELOC(...)
+#define ELEM_RELOC(...) { __VA_ARGS__ },
+
+#include "arc-plt.def"
+
+#undef PLT_TYPE_START
+#undef PLT_TYPE_END
+#undef PLT_ENTRY
+#undef PLT_ELEM
+#undef ENTRY_RELOC
+#undef ELEM_RELOC
+
+
+#define PLT_TYPE_START(NAME)			\
+  {						\
+    .entry = &NAME##_plt_entry,			\
+    .entry_size = sizeof (NAME##_plt_entry),	\
+    .elem = &NAME##_plt_elem,			\
+    .elem_size = sizeof (NAME##_plt_elem),	\
+    .entry_relocs = NAME##_plt_entry_relocs,	\
+    .elem_relocs = NAME##_plt_elem_relocs
+#define PLT_TYPE_END(NAME) },
+#define PLT_ENTRY(...)
+#define PLT_ELEM(...)
+#define ENTRY_RELOC(...)
+#define ELEM_RELOC(...)
+struct plt_version_t plt_versions[PLT_MAX] =
+  {
+#include "arc-plt.def"
+  };
+
+#undef PLT_TYPE_START
+#undef PLT_TYPE_END
+#undef PLT_ENTRY
+#undef PLT_ELEM
+#undef ENTRY_RELOC
+#undef ELEM_RELOC

bfd/arc-plt.def

@@ -1,4 +1,4 @@
-/* Arc V2 Related PLT entries.
+/* Arc V2/V3 Related PLT entries.
    Copyright (C) 2016-2023 Free Software Foundation, Inc.
    Contributed by Cupertino Miranda (cmiranda@synopsys.com).
 
@@ -19,15 +19,72 @@
    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
    MA 02110-1301, USA.  */
 
-PLT_TYPE_START (ELF_ARCV2_PIC)
-  PLT_ENTRY (0x2730, 0x7f8b, 0x0000, 0x0000) /* ld %r11, [pcl,0] : 0 to be replaced by _DYNAMIC@GOTPC+4 */
-  PLT_ENTRY (0x2730, 0x7f8a, 0x0000, 0x0000) /* ld %r10, [pcl,0] : 0 to be replaced by _DYNAMIC@GOTPC+8 */
-  PLT_ENTRY (0x2020, 0x0280)		    /* j [%r10] */
-  PLT_ENTRY (0x0,0x0,0x0,0x0,0x0,0x0)	    /* padding */
 
-  PLT_ELEM (0x2730, 0x7f8c, 0x0000, 0x0000) /* ld %r12, [%pc,func@got] */
+PLT_TYPE_START (ELF_ARCV3_PIC)
-  PLT_ELEM (0x2021, 0x0300)		   /* j.d [%r12] */
+/*
-  PLT_ELEM (0x240a, 0x1fc0)		   /* mov %r12, %pcl */
+  -- at .got.plt + 0 should be the address of .dynamic
+  ldl r11, [pcl, 0] .got.plt + 8
+  ldl r10, [pcl, 0] .got.plt + 16
+  j [r10]
+  padding
+
+  2e:   2731 ff0b 0000 0000     ldl     r11,[pcl,0@s32] ;2c <main+0x2c>
+                        32: R_ARC_GOTPC32       f_var
+  36:   2731 ff0a 0000 0000     ldl     r10,[pcl,0@s32] ;34 <main+0x34>
+                        3a: R_ARC_GOTPC32       f_var
+  3e:   2020 0280               j       [r10]
+*/
+
+/* ldl %r11, [pcl,0] : 0 to be replaced by _DYNAMIC@GOTPC+4.  */
+  PLT_ENTRY (0x2731, 0xff0b, 0x0000, 0x0000)
+/* ldl %r10, [pcl,0] : 0 to be replaced by _DYNAMIC@GOTPC+8.  */
+  PLT_ENTRY (0x2731, 0xff0a, 0x0000, 0x0000)
+/* j [%r10].  */
+  PLT_ENTRY (0x2020, 0x0280)
+/* padding.  */
+  PLT_ENTRY (0x0, 0x0, 0x0, 0x0, 0x0,0x0)
+
+/*
+  ldl r12, [pcl, 0]    -- at .got.plt + 0 should be the address of .dynamic
+
+  46:   2731 ff0c 0000 0000     ldl     r12,[pcl,0@s32] ;44 <main+0x44>
+                        4a: R_ARC_GOTPC32       f_var
+  4e:   2021 0300               j.d     [r12]
+  52:   5c0a 1fc0               movl     r12,pcl
+*/
+
+/* ld %r12, [%pc,func@got].  */
+  PLT_ELEM (0x2731, 0xff0c, 0x0000, 0x0000)
+/* j.d [%r12].  */
+  PLT_ELEM (0x2021, 0x0300)
+/* movl %r12, %pcl.  */
+  PLT_ELEM (0x5c0a, 0x1fc0)
+
+  ENTRY_RELOC (4, 32, 0xFFFFFFFF, SGOT | RELATIVE_INSN_32 | MIDDLE_ENDIAN, 8)
+  ENTRY_RELOC (12, 32, 0xFFFFFFFF, SGOT | RELATIVE_INSN_32 | MIDDLE_ENDIAN, 16)
+  ENTRY_RELOC (20, 32, 0xFFFFFFFF, SGOT, 0)
+
+  ELEM_RELOC (4, 32, 0xFFFFFFFF, SGOT | RELATIVE_INSN_32 | MIDDLE_ENDIAN, 0)
+
+PLT_TYPE_END (ELF_ARCV3_PIC)
+
+
+PLT_TYPE_START (ELF_ARCV2_PIC)
+/* ld %r11, [pcl,0] : 0 to be replaced by _DYNAMIC@GOTPC+4.  */
+  PLT_ENTRY (0x2730, 0x7f8b, 0x0000, 0x0000)
+/* ld %r10, [pcl,0] : 0 to be replaced by _DYNAMIC@GOTPC+8.  */
+  PLT_ENTRY (0x2730, 0x7f8a, 0x0000, 0x0000)
+/* j [%r10].  */
+  PLT_ENTRY (0x2020, 0x0280)
+/* padding.  */
+  PLT_ENTRY (0x0,0x0,0x0,0x0,0x0,0x0)
+
+ /* ld %r12, [%pc,func@got].  */
+  PLT_ELEM (0x2730, 0x7f8c, 0x0000, 0x0000)
+/* j.d [%r12].  */
+  PLT_ELEM (0x2021, 0x0300)
+/* mov %r12, %pcl.  */
+  PLT_ELEM (0x240a, 0x1fc0)
 
   ENTRY_RELOC (4, 32, 0xFFFFFFFF, SGOT | RELATIVE_INSN_32 | MIDDLE_ENDIAN, 4)
   ENTRY_RELOC (12, 32, 0xFFFFFFFF, SGOT | RELATIVE_INSN_32 | MIDDLE_ENDIAN, 8)
@@ -38,14 +95,18 @@ PLT_TYPE_START (ELF_ARCV2_PIC)
 PLT_TYPE_END (ELF_ARCV2_PIC)
 
 PLT_TYPE_START (ELF_ARCV2_ABS)
-  PLT_ENTRY (0x1600,0x700b,0x0000,0x0000)  /* ld %r11, [0] */
+/* ld %r11, [0].  */
-  PLT_ENTRY (0x1600,0x700a,0x0000,0x0000)  /* ld %r10, [0] */
+  PLT_ENTRY (0x1600,0x700b,0x0000,0x0000)
-  PLT_ENTRY (0x2020,0x0280)		  /* j [%r10] */
+/* ld %r10, [0].  */
-  PLT_ENTRY (0x0,0x0,0x0,0x0,0x0,0x0)	  /* padding */
+  PLT_ENTRY (0x1600,0x700a,0x0000,0x0000)
+/* j [%r10].  */
+  PLT_ENTRY (0x2020,0x0280)
+/* padding.  */
+  PLT_ENTRY (0x0,0x0,0x0,0x0,0x0,0x0)
 
-  PLT_ELEM (0x2730, 0x7f8c, 0x0000, 0x0000) /* ld %r12, [%pcl,func@gotpc] */
+  PLT_ELEM (0x2730, 0x7f8c, 0x0000, 0x0000) /* ld %r12, [%pcl,func@gotpc].  */
-  PLT_ELEM (0x2021,0x0300)		   /* j.d [%r12] */
+  PLT_ELEM (0x2021,0x0300)		    /* j.d [%r12].  */
-  PLT_ELEM (0x240a,0x1fc0)		   /* mov %r12, %pcl */
+  PLT_ELEM (0x240a,0x1fc0)		    /* mov %r12, %pcl.  */
 
   ENTRY_RELOC (4, 32, 0xFFFFFFFF, SGOT | MIDDLE_ENDIAN, 4)
   ENTRY_RELOC (12, 32, 0xFFFFFFFF, SGOT | MIDDLE_ENDIAN, 8)
@@ -59,14 +120,18 @@ PLT_TYPE_END (ELF_ARCV2_ABS)
 /* Non Arc V2 Related PLT entries.  */
 
 PLT_TYPE_START (ELF_ARC_PIC)
-  PLT_ENTRY (0x2730,0x7f8b,0x0000,0x0000) /* ld %r11, [pcl,0] : 0 to be replaced by _DYNAMIC@GOTPC+4 */
+/* ld %r11, [pcl,0] : 0 to be replaced by _DYNAMIC@GOTPC+4.  */
-  PLT_ENTRY (0x2730,0x7f8a,0x0000,0x0000) /* ld %r10, [pcl,0] : 0 to be replaced by -DYNAMIC@GOTPC+8  */
+  PLT_ENTRY (0x2730,0x7f8b,0x0000,0x0000)
-  PLT_ENTRY (0x2020,0x0280)		 /* j [%r10] */
+/* ld %r10, [pcl,0] : 0 to be replaced by -DYNAMIC@GOTPC+8.  */
-  PLT_ENTRY (0x0,0x0)			 /* padding */
+  PLT_ENTRY (0x2730,0x7f8a,0x0000,0x0000)
+/* j [%r10].  */
+  PLT_ENTRY (0x2020,0x0280)
+/* padding.  */
+  PLT_ENTRY (0x0,0x0)
 
-  PLT_ELEM (0x2730,0x7f8c,0x0000,0x0000)  /* ld %r12, [%pc,func@got]   */
+  PLT_ELEM (0x2730,0x7f8c,0x0000,0x0000)  /* ld %r12, [%pc,func@got].  */
-  PLT_ELEM (0x7c20)			 /* j_s.d [%r12]	      */
+  PLT_ELEM (0x7c20)			  /* j_s.d [%r12].  */
-  PLT_ELEM (0x74ef)			 /* mov_s %r12, %pcl          */
+  PLT_ELEM (0x74ef)			  /* mov_s %r12, %pcl.  */
 
   ENTRY_RELOC (4, 32, 0xFFFFFFFF, SGOT | RELATIVE_INSN_32 | MIDDLE_ENDIAN, 4)
   ENTRY_RELOC (12, 32, 0xFFFFFFFF, SGOT | RELATIVE_INSN_32 | MIDDLE_ENDIAN, 8)
@@ -77,13 +142,13 @@ PLT_TYPE_START (ELF_ARC_PIC)
 PLT_TYPE_END (ELF_ARC_PIC)
 
 PLT_TYPE_START (ELF_ARC_ABS)
-  PLT_ENTRY (0x1600,0x700b,0x0000,0x0000) /* ld %r11, [0] */
+  PLT_ENTRY (0x1600,0x700b,0x0000,0x0000) /* ld %r11, [0].  */
-  PLT_ENTRY (0x1600,0x700a,0x0000,0x0000) /* ld %r10, [0] */
+  PLT_ENTRY (0x1600,0x700a,0x0000,0x0000) /* ld %r10, [0].  */
-  PLT_ENTRY (0x2020,0x0280)		 /* j [%r10] */
+  PLT_ENTRY (0x2020,0x0280)		  /* j [%r10].  */
-  PLT_ENTRY (0x0,0x0)			 /* padding */
+  PLT_ENTRY (0x0,0x0)			  /* padding.  */
 
-  PLT_ELEM (0x2730,0x7f8c,0x0000,0x0000) /* ld %r12, [%pc,func@gotpc] */
+  PLT_ELEM (0x2730,0x7f8c,0x0000,0x0000) /* ld %r12, [%pc,func@gotpc].  */
-  PLT_ELEM (0x7c20,0x74ef)		/* mov_s %r12, %pcl          */
+  PLT_ELEM (0x7c20,0x74ef)		 /* mov_s %r12, %pcl.  */
 
   ENTRY_RELOC (4, 32, 0xFFFFFFFF, SGOT | MIDDLE_ENDIAN, 4)
   ENTRY_RELOC (12, 32, 0xFFFFFFFF, SGOT | MIDDLE_ENDIAN, 8)

bfd/arc-plt.h

@@ -22,6 +22,9 @@
 #ifndef ARC_PLT_H
 #define ARC_PLT_H
 
+#include "sysdep.h"
+#include "bfd.h"
+
 /* Instructions appear in memory as a sequence of half-words (16 bit);
    individual half-words are represented on the target in target byte order.
    We use 'unsigned short' on the host to represent the PLT templates,
@@ -92,97 +95,20 @@ struct plt_version_t
 };
 
 #define PLT_TYPE_START(NAME) \
-  const insn_hword NAME##_plt_entry[] = {
+  extern const insn_hword NAME##_plt_entry[]; \
-#define PLT_TYPE_END(NAME) };
+  extern const struct plt_reloc NAME##_plt_entry_relocs[]; \
-#define PLT_ENTRY(...) __VA_ARGS__,
+  extern const insn_hword NAME##_plt_elem[]; \
-#define PLT_ELEM(...)
+  extern const struct plt_reloc NAME##_plt_elem_relocs[];
-#define ENTRY_RELOC(...)
-#define ELEM_RELOC(...)
-
-#include "arc-plt.def"
-
-#undef PLT_TYPE_START
-#undef PLT_TYPE_END
-#undef PLT_ENTRY
-#undef PLT_ELEM
-#undef ENTRY_RELOC
-#undef ELEM_RELOC
-
-#define PLT_TYPE_START(NAME) \
-  const struct plt_reloc NAME##_plt_entry_relocs[] = {
-#define PLT_TYPE_END(NAME) \
-    {0, 0, 0, LAST_RELOC, 0} \
-  };
-#define PLT_ENTRY(...)
-#define PLT_ELEM(...)
-#define ENTRY_RELOC(...) { __VA_ARGS__ },
-#define ELEM_RELOC(...)
-
-#include "arc-plt.def"
-
-#undef PLT_TYPE_START
-#undef PLT_TYPE_END
-#undef PLT_ENTRY
-#undef PLT_ELEM
-#undef ENTRY_RELOC
-#undef ELEM_RELOC
 
 
-#define PLT_TYPE_START(NAME) \
+#define PLT_TYPE_END(NAME)
-  const insn_hword NAME##_plt_elem[] = {
-#define PLT_TYPE_END(NAME) };
-#define PLT_ENTRY(...)
-#define PLT_ELEM(...) __VA_ARGS__,
-#define ENTRY_RELOC(...)
-#define ELEM_RELOC(...)
-
-#include "arc-plt.def"
-
-#undef PLT_TYPE_START
-#undef PLT_TYPE_END
-#undef PLT_ENTRY
-#undef PLT_ELEM
-#undef ENTRY_RELOC
-#undef ELEM_RELOC
-
-#define PLT_TYPE_START(NAME) \
-  const struct plt_reloc NAME##_plt_elem_relocs[] = {
-#define PLT_TYPE_END(NAME) \
-    {0, 0, 0, LAST_RELOC, 0} \
-  };
-#define PLT_ENTRY(...)
-#define PLT_ELEM(...)
-#define ENTRY_RELOC(...)
-#define ELEM_RELOC(...) { __VA_ARGS__ },
-
-#include "arc-plt.def"
-
-#undef PLT_TYPE_START
-#undef PLT_TYPE_END
-#undef PLT_ENTRY
-#undef PLT_ELEM
-#undef ENTRY_RELOC
-#undef ELEM_RELOC
-
-
-#define PLT_TYPE_START(NAME) \
-  { \
-    .entry = &NAME##_plt_entry, \
-    .entry_size = sizeof (NAME##_plt_entry), \
-    .elem = &NAME##_plt_elem, \
-    .elem_size = sizeof (NAME##_plt_elem),  \
-    .entry_relocs = NAME##_plt_entry_relocs, \
-    .elem_relocs = NAME##_plt_elem_relocs
-#define PLT_TYPE_END(NAME) },
 #define PLT_ENTRY(...)
 #define PLT_ELEM(...)
 #define ENTRY_RELOC(...)
 #define ELEM_RELOC(...)
-const struct plt_version_t plt_versions[PLT_MAX] = {
 
 #include "arc-plt.def"
 
-};
 #undef PLT_TYPE_START
 #undef PLT_TYPE_END
 #undef PLT_ENTRY
@@ -190,5 +116,6 @@ const struct plt_version_t plt_versions[PLT_MAX] = {
 #undef ENTRY_RELOC
 #undef ELEM_RELOC
 
+extern struct plt_version_t plt_versions[PLT_MAX];
 
-#endif /* ARC_PLT_H */
+#endif

bfd/archures.c

@@ -361,6 +361,9 @@ DESCRIPTION
 .#define bfd_mach_arc_arc601	4
 .#define bfd_mach_arc_arc700	3
 .#define bfd_mach_arc_arcv2	5
+.  bfd_arch_arc64,     {* ARCv3 32/64 Cores.  *}
+.#define bfd_mach_arcv3_64	1
+.#define bfd_mach_arcv3_32	2
 . bfd_arch_m32c,       {* Renesas M16C/M32C.  *}
 .#define bfd_mach_m16c		0x75
 .#define bfd_mach_m32c		0x78
@@ -632,6 +635,7 @@ extern const bfd_arch_info_type bfd_aarch64_arch;
 extern const bfd_arch_info_type bfd_alpha_arch;
 extern const bfd_arch_info_type bfd_amdgcn_arch;
 extern const bfd_arch_info_type bfd_arc_arch;
+extern const bfd_arch_info_type bfd_arc64_arch;
 extern const bfd_arch_info_type bfd_arm_arch;
 extern const bfd_arch_info_type bfd_avr_arch;
 extern const bfd_arch_info_type bfd_bfin_arch;
@@ -721,6 +725,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
     &bfd_alpha_arch,
     &bfd_amdgcn_arch,
     &bfd_arc_arch,
+    &bfd_arc64_arch,
     &bfd_arm_arch,
     &bfd_avr_arch,
     &bfd_bfin_arch,

bfd/bfd-in2.h

@@ -1617,6 +1617,9 @@ enum bfd_architecture
 #define bfd_mach_arc_arc601    4
 #define bfd_mach_arc_arc700    3
 #define bfd_mach_arc_arcv2     5
+  bfd_arch_arc64,     /* ARCv3 32/64 Cores.  */
+#define bfd_mach_arcv3_64      1
+#define bfd_mach_arcv3_32      2
  bfd_arch_m32c,       /* Renesas M16C/M32C.  */
 #define bfd_mach_m16c          0x75
 #define bfd_mach_m32c          0x78
@@ -4383,6 +4386,7 @@ pc-relative or some form of GOT-indirect relocation.  */
   BFD_RELOC_ARC_16,
   BFD_RELOC_ARC_24,
   BFD_RELOC_ARC_32,
+  BFD_RELOC_ARC_64,
   BFD_RELOC_ARC_N8,
   BFD_RELOC_ARC_N16,
   BFD_RELOC_ARC_N24,
@@ -4447,6 +4451,27 @@ pc-relative or some form of GOT-indirect relocation.  */
   BFD_RELOC_ARC_S21H_PCREL_PLT,
   BFD_RELOC_ARC_NPS_CMEM16,
   BFD_RELOC_ARC_JLI_SECTOFF,
+  BFD_RELOC_ARC_S7H_PCREL,
+  BFD_RELOC_ARC_S8H_PCREL,
+  BFD_RELOC_ARC_S9H_PCREL,
+  BFD_RELOC_ARC_S10H_PCREL,
+  BFD_RELOC_ARC_S13H_PCREL,
+  BFD_RELOC_ARC_ALIGN,
+  BFD_RELOC_ARC_ADD8,
+  BFD_RELOC_ARC_ADD16,
+  BFD_RELOC_ARC_SUB8,
+  BFD_RELOC_ARC_SUB16,
+  BFD_RELOC_ARC_SUB32,
+  BFD_RELOC_ARC_LO32,
+  BFD_RELOC_ARC_HI32,
+  BFD_RELOC_ARC_LO32_ME,
+  BFD_RELOC_ARC_HI32_ME,
+  BFD_RELOC_ARC_N64,
+  BFD_RELOC_ARC_SDA_LDST3,
+  BFD_RELOC_ARC_NLO32,
+  BFD_RELOC_ARC_NLO32_ME,
+  BFD_RELOC_ARC_PCLO32_ME_2,
+  BFD_RELOC_ARC_PLT34,
 
 /* ADI Blackfin 16 bit immediate absolute reloc.  */
   BFD_RELOC_BFIN_16_IMM,

bfd/config.bfd

@@ -180,7 +180,8 @@ case "${targ_cpu}" in
 aarch64*)	 targ_archs="bfd_aarch64_arch bfd_arm_arch";;
 alpha*)		 targ_archs=bfd_alpha_arch ;;
 am33_2.0*)	 targ_archs=bfd_mn10300_arch ;;
-arc*)		 targ_archs=bfd_arc_arch ;;
+arc|arceb)	 targ_archs=bfd_arc_arch ;;
+arc64|arc32)	 targ_archs=bfd_arc64_arch ;;
 arm*)		 targ_archs=bfd_arm_arch ;;
 amdgcn*)	 targ_archs=bfd_amdgcn_arch ;;
 bfin*)		 targ_archs=bfd_bfin_arch ;;
@@ -353,16 +354,29 @@ case "${targ}" in
     targ_defvec=am33_elf32_linux_vec
     ;;
 
-  arc*eb-*-elf* | arc*eb-*-linux*)
+  arceb-*-elf* | arceb-*-linux*)
     targ_defvec=arc_elf32_be_vec
     targ_selvecs=arc_elf32_le_vec
     ;;
 
-  arc*-*-elf* | arc*-*-linux*)
+  arc-*-elf* | arc-*-linux*)
     targ_defvec=arc_elf32_le_vec
     targ_selvecs=arc_elf32_be_vec
     ;;
 
+#ifdef BFD64
+  arc64-*-*)
+    targ_defvec=arc64_elf64_le_vec
+    targ_selvecs=arc64_elf32_le_vec
+    want64=true
+    ;;
+  arc32-*-*)
+    targ_defvec=arc64_elf32_le_vec
+    targ_selvecs=arc64_elf64_le_vec
+    want64=true
+    ;;
+#endif
+
   arm-*-darwin*)
     targ_defvec=arm_mach_o_vec
     targ_selvecs="mach_o_le_vec mach_o_be_vec mach_o_fat_vec"

bfd/configure

@@ -13883,8 +13883,10 @@ do
     aout0_be_vec)		 tb="$tb aout0.lo aout32.lo" ;;
     aout64_vec)			 tb="$tb demo64.lo aout64.lo"; target_size=64 ;;
     aout_vec)			 tb="$tb host-aout.lo aout32.lo" ;;
-    arc_elf32_be_vec)		 tb="$tb elf32-arc.lo elf32.lo $elf" ;;
+    arc_elf32_be_vec)		 tb="$tb arc-plt.lo elf32-arc.lo elf32.lo $elf" ;;
-    arc_elf32_le_vec)		 tb="$tb elf32-arc.lo elf32.lo $elf" ;;
+    arc_elf32_le_vec)		 tb="$tb arc-plt.lo elf32-arc.lo elf32.lo $elf" ;;
+    arc64_elf64_le_vec)		 tb="$tb arc-plt.lo elf64-arc64.lo elf64.lo $elf"; target_size=64 ;;
+    arc64_elf32_le_vec)		 tb="$tb arc-plt.lo elf32-arc64.lo elf32.lo $elf"; target_size=64 ;;
     arm_elf32_be_vec)		 tb="$tb elf32-arm.lo elf32.lo elf-nacl.lo elf-vxworks.lo $elf" ;;
     arm_elf32_le_vec)		 tb="$tb elf32-arm.lo elf32.lo elf-nacl.lo elf-vxworks.lo $elf" ;;
     arm_elf32_fdpic_be_vec)	 tb="$tb elf32-arm.lo elf32.lo elf-nacl.lo elf-vxworks.lo $elf" ;;

bfd/configure.ac

@@ -419,8 +419,10 @@ do
     aout0_be_vec)		 tb="$tb aout0.lo aout32.lo" ;;
     aout64_vec)			 tb="$tb demo64.lo aout64.lo"; target_size=64 ;;
     aout_vec)			 tb="$tb host-aout.lo aout32.lo" ;;
-    arc_elf32_be_vec)		 tb="$tb elf32-arc.lo elf32.lo $elf" ;;
+    arc_elf32_be_vec)		 tb="$tb arc-plt.lo elf32-arc.lo elf32.lo $elf" ;;
-    arc_elf32_le_vec)		 tb="$tb elf32-arc.lo elf32.lo $elf" ;;
+    arc_elf32_le_vec)		 tb="$tb arc-plt.lo elf32-arc.lo elf32.lo $elf" ;;
+    arc64_elf64_le_vec)		 tb="$tb arc-plt.lo elf64-arc64.lo elf64.lo $elf"; target_size=64 ;;
+    arc64_elf32_le_vec)		 tb="$tb arc-plt.lo elf32-arc64.lo elf32.lo $elf"; target_size=64 ;;
     arm_elf32_be_vec)		 tb="$tb elf32-arm.lo elf32.lo elf-nacl.lo elf-vxworks.lo $elf" ;;
     arm_elf32_le_vec)		 tb="$tb elf32-arm.lo elf32.lo elf-nacl.lo elf-vxworks.lo $elf" ;;
     arm_elf32_fdpic_be_vec)	 tb="$tb elf32-arm.lo elf32.lo elf-nacl.lo elf-vxworks.lo $elf" ;;

bfd/cpu-arc.c

@@ -26,51 +26,53 @@
 static const bfd_arch_info_type *
 arc_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b);
 
-#define ARC(mach, print_name, default_p, next) \
+#define ARC(BITS_WORD, BITS_ADDR, MACH, PRINT_NAME, DEFAULT_P, NEXT)	\
-  {					       \
+{									\
-    32,	/* Bits in a word.  */		\
+    BITS_WORD,	/* 32 bits in a word.  */				\
-    32,	/* Bits in an address.  */	\
+    BITS_ADDR,	/* 32 bits in an address.  */				\
-    8,	/* Bits in a byte.  */		\
+    8,	/* 8 bits in a byte.  */				\
     bfd_arch_arc,							\
-    mach,				\
+    MACH,								\
     "arc",								\
-    print_name,				\
+    PRINT_NAME,								\
-    4, /* Section alignment power.  */	\
+    4, /* section alignment power.  */					\
-    default_p,				\
+    DEFAULT_P,								\
     arc_compatible,							\
     bfd_default_scan,							\
     bfd_arch_default_fill,						\
-    next,				\
+    NEXT,								\
     0 /* Maximum offset of a reloc from the start of an insn.  */	\
-  }
+}
 
 static const bfd_arch_info_type arch_info_struct[] =
 {
-  ARC (bfd_mach_arc_arc600, "A6"    , false, &arch_info_struct[1]),
+  ARC (32, 32, bfd_mach_arc_arc600, "A6"    , false, &arch_info_struct[1]),
-  ARC (bfd_mach_arc_arc601, "ARC601", false, &arch_info_struct[2]),
+  ARC (32, 32, bfd_mach_arc_arc601, "ARC601", false, &arch_info_struct[2]),
-  ARC (bfd_mach_arc_arc700, "ARC700", false, &arch_info_struct[3]),
+  ARC (32, 32, bfd_mach_arc_arc700, "ARC700", false, &arch_info_struct[3]),
-  ARC (bfd_mach_arc_arc700, "A7",     false, &arch_info_struct[4]),
+  ARC (32, 32, bfd_mach_arc_arc700, "A7",     false, &arch_info_struct[4]),
-  ARC (bfd_mach_arc_arcv2,  "ARCv2",  false, &arch_info_struct[5]),
+  ARC (32, 32, bfd_mach_arc_arcv2,  "ARCv2",  false, &arch_info_struct[5]),
-  ARC (bfd_mach_arc_arcv2,  "EM",     false, &arch_info_struct[6]),
+  ARC (32, 32, bfd_mach_arc_arcv2,  "EM",     false, &arch_info_struct[6]),
-  ARC (bfd_mach_arc_arcv2,  "HS",     false, NULL),
+  ARC (32, 32, bfd_mach_arc_arcv2,  "HS",     false, NULL),
 };
 
 const bfd_arch_info_type bfd_arc_arch =
-  ARC (bfd_mach_arc_arc600, "ARC600", true, &arch_info_struct[0]);
+  ARC (32, 32, bfd_mach_arc_arc600, "ARC600", true, &arch_info_struct[0]);
 
-/* ARC-specific "compatible" function.  The general rule is that if A and B are
+/* ARC-specific "compatible" function.  The general rule is that if A
-   compatible, then this function should return architecture that is more
+   and B are compatible, then this function should return architecture
-   "feature-rich", that is, can run both A and B.  ARCv2, EM and HS all has
+   that is more "feature-rich", that is, can run both A and B.  ARCv2,
-   same mach number, so bfd_default_compatible assumes they are the same, and
+   EM and HS all has same mach number, so bfd_default_compatible
-   returns an A.  That causes issues with GDB, because GDB assumes that if
+   assumes they are the same, and returns an A.  That causes issues
-   machines are compatible, then "compatible ()" always returns same machine
+   with GDB, because GDB assumes that if machines are compatible, then
-   regardless of argument order.  As a result GDB gets confused because, for
+   "compatible ()" always returns same machine regardless of argument
-   example, compatible (ARCv2, EM) returns ARCv2, but compatible (EM, ARCv2)
+   order.  As a result GDB gets confused because, for example,
-   returns EM, hence GDB is not sure if they are compatible and prints a
+   compatible (ARCv2, EM) returns ARCv2, but compatible (EM, ARCv2)
-   warning.  */
+   returns EM, hence GDB is not sure if they are compatible and prints
+   a warning.  */
 
 static const bfd_arch_info_type *
-arc_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
+arc_compatible (const bfd_arch_info_type *a ATTRIBUTE_UNUSED,
+		const bfd_arch_info_type *b ATTRIBUTE_UNUSED)
 {
   const bfd_arch_info_type * const em = &arch_info_struct[5];
   const bfd_arch_info_type * const hs = &arch_info_struct[6];
@@ -84,9 +86,6 @@ arc_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
   if (a->arch != b->arch)
     return NULL;
 
-  if (a->bits_per_word != b->bits_per_word)
-    return NULL;
-
   /* ARCv2|EM and EM.  */
   if ((a->mach == bfd_mach_arc_arcv2 && b == em)
       || (b->mach == bfd_mach_arc_arcv2 && a == em))

bfd/cpu-arc64.c

@@ -0,0 +1,75 @@
+/* BFD support for the ARC64 processor
+   Copyright (C) 2023 Free Software Foundation, Inc.
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#include "sysdep.h"
+#include "bfd.h"
+#include "libbfd.h"
+
+/* ARC64-specific "compatible" function.  The general rule is that if
+   A and B are compatible, then this function should return
+   architecture that is more "feature-rich", that is, can run both A
+   and B.  */
+
+static const bfd_arch_info_type *
+compatible (const bfd_arch_info_type *a ATTRIBUTE_UNUSED,
+	    const bfd_arch_info_type *b ATTRIBUTE_UNUSED)
+{
+  /* If a & b are for different architecture we can do nothing.  */
+  if (a->arch != b->arch)
+    return NULL;
+
+  /* If a & b are for the same machine then all is well.  */
+  if (a->mach == b->mach)
+    return a;
+
+  /* Otherwise if either a or b is the 'default' machine
+     then it can be polymorphed into the other.  */
+  if (a->the_default)
+    return b;
+
+  if (b->the_default)
+    return a;
+
+  return NULL;
+}
+
+#define ARC64(WORDSIZE, MACH, PRINT_NAME, DEFAULT_P, NEXT)	\
+  {								\
+    WORDSIZE,	/* 64/32 bits in a word.  */			\
+    WORDSIZE,	/* 64/32 bits in an address.  */		\
+    8,	/* 8 bits in a byte.  */				\
+    bfd_arch_arc64,						\
+    MACH,							\
+    "arc64",							\
+    PRINT_NAME,							\
+    4, /* section alignment power.  */				\
+    DEFAULT_P,							\
+    compatible,							\
+    bfd_default_scan,						\
+    bfd_arch_default_fill,					\
+    NEXT,							\
+    0 /* Maximum offset of a reloc from the start of an insn.  */ \
+  }
+
+static const bfd_arch_info_type bfd_arc64_arch_32 =
+  ARC64 (32, bfd_mach_arcv3_32, "arc64:32", false, NULL);
+
+const bfd_arch_info_type bfd_arc64_arch =
+  ARC64 (64, bfd_mach_arcv3_64, "arc64:64", true, &bfd_arc64_arch_32);

bfd/libbfd.h

@@ -1876,6 +1876,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
   "BFD_RELOC_ARC_16",
   "BFD_RELOC_ARC_24",
   "BFD_RELOC_ARC_32",
+  "BFD_RELOC_ARC_64",
   "BFD_RELOC_ARC_N8",
   "BFD_RELOC_ARC_N16",
   "BFD_RELOC_ARC_N24",
@@ -1940,6 +1941,27 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
   "BFD_RELOC_ARC_S21H_PCREL_PLT",
   "BFD_RELOC_ARC_NPS_CMEM16",
   "BFD_RELOC_ARC_JLI_SECTOFF",
+  "BFD_RELOC_ARC_S7H_PCREL",
+  "BFD_RELOC_ARC_S8H_PCREL",
+  "BFD_RELOC_ARC_S9H_PCREL",
+  "BFD_RELOC_ARC_S10H_PCREL",
+  "BFD_RELOC_ARC_S13H_PCREL",
+  "BFD_RELOC_ARC_ALIGN",
+  "BFD_RELOC_ARC_ADD8",
+  "BFD_RELOC_ARC_ADD16",
+  "BFD_RELOC_ARC_SUB8",
+  "BFD_RELOC_ARC_SUB16",
+  "BFD_RELOC_ARC_SUB32",
+  "BFD_RELOC_ARC_LO32",
+  "BFD_RELOC_ARC_HI32",
+  "BFD_RELOC_ARC_LO32_ME",
+  "BFD_RELOC_ARC_HI32_ME",
+  "BFD_RELOC_ARC_N64",
+  "BFD_RELOC_ARC_SDA_LDST3",
+  "BFD_RELOC_ARC_NLO32",
+  "BFD_RELOC_ARC_NLO32_ME",
+  "BFD_RELOC_ARC_PCLO32_ME_2",
+  "BFD_RELOC_ARC_PLT34",
   "BFD_RELOC_BFIN_16_IMM",
   "BFD_RELOC_BFIN_16_HIGH",
   "BFD_RELOC_BFIN_4_PCREL",

bfd/reloc.c

@@ -3424,6 +3424,8 @@ ENUMX
   BFD_RELOC_ARC_24
 ENUMX
   BFD_RELOC_ARC_32
+ENUMX
+  BFD_RELOC_ARC_64
 ENUMX
   BFD_RELOC_ARC_N8
 ENUMX
@@ -3552,6 +3554,48 @@ ENUMX
   BFD_RELOC_ARC_NPS_CMEM16
 ENUMX
   BFD_RELOC_ARC_JLI_SECTOFF
+ENUMX
+  BFD_RELOC_ARC_S7H_PCREL
+ENUMX
+  BFD_RELOC_ARC_S8H_PCREL
+ENUMX
+  BFD_RELOC_ARC_S9H_PCREL
+ENUMX
+  BFD_RELOC_ARC_S10H_PCREL
+ENUMX
+  BFD_RELOC_ARC_S13H_PCREL
+ENUMX
+  BFD_RELOC_ARC_ALIGN
+ENUMX
+  BFD_RELOC_ARC_ADD8
+ENUMX
+  BFD_RELOC_ARC_ADD16
+ENUMX
+  BFD_RELOC_ARC_SUB8
+ENUMX
+  BFD_RELOC_ARC_SUB16
+ENUMX
+  BFD_RELOC_ARC_SUB32
+ENUMX
+  BFD_RELOC_ARC_LO32
+ENUMX
+  BFD_RELOC_ARC_HI32
+ENUMX
+  BFD_RELOC_ARC_LO32_ME
+ENUMX
+  BFD_RELOC_ARC_HI32_ME
+ENUMX
+  BFD_RELOC_ARC_N64
+ENUMX
+  BFD_RELOC_ARC_SDA_LDST3
+ENUMX
+  BFD_RELOC_ARC_NLO32
+ENUMX
+  BFD_RELOC_ARC_NLO32_ME
+ENUMX
+  BFD_RELOC_ARC_PCLO32_ME_2
+ENUMX
+  BFD_RELOC_ARC_PLT34
 ENUMDOC
   ARC relocs.
 

bfd/targets.c

@@ -695,6 +695,8 @@ extern const bfd_target amdgcn_elf64_le_vec;
 extern const bfd_target aout_vec;
 extern const bfd_target arc_elf32_be_vec;
 extern const bfd_target arc_elf32_le_vec;
+extern const bfd_target arc64_elf32_le_vec;
+extern const bfd_target arc64_elf64_le_vec;
 extern const bfd_target arm_elf32_be_vec;
 extern const bfd_target arm_elf32_le_vec;
 extern const bfd_target arm_elf32_fdpic_be_vec;
@@ -999,6 +1001,10 @@ static const bfd_target * const _bfd_target_vector[] =
 	&aarch64_mach_o_vec,
 	&aarch64_pe_le_vec,
 	&aarch64_pei_le_vec,
+	&arc_elf32_be_vec,
+	&arc_elf32_le_vec,
+	&arc64_elf32_le_vec,
+	&arc64_elf64_le_vec,
 #endif
 
 #ifdef BFD64