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sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}

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The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state.  This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.

It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
This commit is contained in:
Mike Frysinger
2015-04-16 02:11:12 -04:00
parent 27b97b40bc
commit 034685f9ce
64 changed files with 184 additions and 116 deletions
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8
sim/lm32/ChangeLog
View File

@@ -1,3 +1,11 @@
2015-04-17 Mike Frysinger <vapier@gentoo.org>
* dv-lm32cpu.c (deliver_lm32cpu_interrupt): Change CIA_GET to
CPU_PC_GET.
(lm32cpu_port_event): Likewise.
* sim-main.h (CIA_GET, CIA_SET): Delete.
* traps.c (lm32_core_signal): Change CIA_SET to CPU_PC_SET.
2015-04-15 Mike Frysinger <vapier@gentoo.org>
* Makefile.in (SIM_OBJS): Delete sim-cpu.o.

4
sim/lm32/dv-lm32cpu.c
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@@ -137,7 +137,7 @@ deliver_lm32cpu_interrupt (struct hw *me, void *data)
struct lm32cpu *controller = hw_data (me);
SIM_DESC sd = hw_system (me);
sim_cpu *cpu = STATE_CPU (sd, 0); /* NB: fix CPU 0. */
address_word cia = CIA_GET (cpu);
address_word cia = CPU_PC_GET (cpu);
int interrupt = (int) data;
@@ -192,7 +192,7 @@ lm32cpu_port_event (struct hw *me,
struct lm32cpu *controller = hw_data (me);
SIM_DESC sd = hw_system (me);
sim_cpu *cpu = STATE_CPU (sd, 0); /* NB: fix CPU 0. */
address_word cia = CIA_GET (cpu);
address_word cia = CPU_PC_GET (cpu);
HW_TRACE ((me, "interrupt event on port %d, level %d", my_port, level));

3
sim/lm32/sim-main.h
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@@ -38,9 +38,6 @@ typedef struct _sim_cpu SIM_CPU;
/* These must be defined before sim-base.h. */
typedef USI sim_cia;
#define CIA_GET(cpu) CPU_PC_GET (cpu)
#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
#define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \
do { \
if (cpu) /* null if ctrl-c */ \

4
sim/lm32/traps.c
View File

@@ -245,7 +245,7 @@ lm32_core_signal (SIM_DESC sd,
SET_H_GR (30, ip);
/* Save and clear interrupt enable. */
SET_H_CSR (LM32_CSR_IE, (GET_H_CSR (LM32_CSR_IE) & 1) << 1);
CIA_SET (cpu, GET_H_CSR (LM32_CSR_EBA) + LM32_EID_DATA_BUS_ERROR * 32);
CPU_PC_SET (cpu, GET_H_CSR (LM32_CSR_EBA) + LM32_EID_DATA_BUS_ERROR * 32);
sim_engine_halt (sd, cpu, NULL, LM32_EID_DATA_BUS_ERROR * 32,
sim_stopped, SIM_SIGSEGV);
break;
@@ -257,7 +257,7 @@ lm32_core_signal (SIM_DESC sd,
SET_H_GR (30, ip);
/* Save and clear interrupt enable. */
SET_H_CSR (LM32_CSR_IE, (GET_H_CSR (LM32_CSR_IE) & 1) << 1);
CIA_SET (cpu, GET_H_CSR (LM32_CSR_EBA) + LM32_EID_DATA_BUS_ERROR * 32);
CPU_PC_SET (cpu, GET_H_CSR (LM32_CSR_EBA) + LM32_EID_DATA_BUS_ERROR * 32);
sim_engine_halt (sd, cpu, NULL, LM32_EID_DATA_BUS_ERROR * 32,
sim_stopped, SIM_SIGBUS);
break;