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RISC-V: Dump instruction without checking architecture support as usual.

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Since QEMU have supported -Max option to to enable all normal extensions,
the dis-assembler should also add an option, -M,max to do the same thing.
For the instruction, which have overlapped encodings like zfinx, will not
be considered by the -M,max option.

opcodes/
	* riscv-dis.c (all_ext): New static boolean.  If set, disassemble
	without checking architectire string.
	(riscv_disassemble_insn): Likewise.
	(parse_riscv_dis_option_without_args): Recognized -M,max option.
binutils/
	* NEWS: Updated.
This commit is contained in:
Nelson Chu
2023-10-27 08:39:17 +08:00
parent 4868f6025e
commit 004a5bfc72
2 changed files with 10 additions and 1 deletions
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3
binutils/NEWS
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@@ -1,5 +1,8 @@
-*- text -*-
* RISC-V disassembly now supports -M,max option like QEMU to dump instruction
without checking architecture support as usual.
Changes in 2.43:
* The MIPS port now supports microMIPS MT Application Specific Extension